]> git.ipfire.org Git - thirdparty/u-boot.git/commit
spi: cadence_qspi: Fix odd byte write issue in STIG mode
authorVenkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Fri, 4 Jul 2025 04:04:44 +0000 (09:34 +0530)
committerMichal Simek <michal.simek@amd.com>
Tue, 8 Jul 2025 12:58:44 +0000 (14:58 +0200)
commitcd9123507003e07b13e61d72e14e493bb338e827
tree4bc03778baefb32f29cf14bcf27824e3d2b30ea5
parent28fe6ea6e5744e008247ed5171ac25373e6863ce
spi: cadence_qspi: Fix odd byte write issue in STIG mode

Starting from 'commit <8077d296adff> ("spi: cadence-quadspi: Use STIG
mode for all ops with small payload") the utilization of STIG mode
has been implemented for read and write operations involving less
than 8 bytes of data.

However, following this commit, encountering timeout issues occurs when
writing odd bytes of data in DDR mode, as indicated below:
"jedec_spi_nor flash@0: flash operation timed out
SF: 3 bytes @ 0x0 Written: ERROR -110"

To resolve this issue, the number of bytes to write has been updated
specifically for DDR mode.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250704040444.671604-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/spi/cadence_qspi_apb.c