expand: ICE if asked to expand RDIV with non-float type.

expand: ICE if asked to expand RDIV with non-float type.

This patch adds asserts that ensure we only expand an RDIV_EXPR with
actual float mode.  It also replaces the RDIV_EXPR in setting a
vectorized loop's length by EXACT_DIV_EXPR.  The code in question is
only used with length-control targets (riscv, powerpc, s390).

	PR target/121014

gcc/ChangeLog:

	* cfgexpand.cc (expand_debug_expr): Assert FLOAT_MODE_P.
	* optabs-tree.cc (optab_for_tree_code): Assert FLOAT_TYPE_P.
	* tree-vect-loop.cc (vect_get_loop_len): Use EXACT_DIV_EXPR.