From 006d5ccfc4db254f437fa359cadb7870c9806a31 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Wed, 17 Feb 2016 17:55:33 +0000 Subject: [PATCH] backport: altivec.md (*altivec_lvxl__internal): Output correct instruction. [gcc] 2016-02-17 Bill Schmidt Backport from mainline 2016-02-17 Bill Schmidt * config/rs6000/altivec.md (*altivec_lvxl__internal): Output correct instruction. [gcc/testsuite] 2016-02-17 Bill Schmidt Backport from mainline 2012-02-17 Bill Schmidt * gcc.target/powerpc/vec-cg.c: New test. From-SVN: r233504 --- gcc/ChangeLog | 8 ++++++++ gcc/config/rs6000/altivec.md | 2 +- gcc/testsuite/ChangeLog | 7 +++++++ gcc/testsuite/gcc.target/powerpc/vec-cg.c | 22 ++++++++++++++++++++++ 4 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-cg.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9ad8a0adf647..b8bd435ece37 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2016-02-17 Bill Schmidt + + Backport from mainline + 2016-02-17 Bill Schmidt + + * config/rs6000/altivec.md (*altivec_lvxl__internal): Output + correct instruction. + 2016-02-17 Bernd Schmidt Backport from mainline diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 63e72370e0f1..22346e1c563d 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -2436,7 +2436,7 @@ (match_operand:VM2 1 "memory_operand" "Z")) (unspec [(const_int 0)] UNSPEC_SET_VSCR)])] "TARGET_ALTIVEC" - "lvx %0,%y1" + "lvxl %0,%y1" [(set_attr "type" "vecload")]) (define_expand "altivec_lvx_" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f89344c351f1..3be3e1c4a056 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2016-02-17 Bill Schmidt + + Backport from mainline + 2012-02-17 Bill Schmidt + + * gcc.target/powerpc/vec-cg.c: New test. + 2016-02-17 Bernd Schmidt Backport from mainline diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cg.c b/gcc/testsuite/gcc.target/powerpc/vec-cg.c new file mode 100644 index 000000000000..c31d217d880e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-cg.c @@ -0,0 +1,22 @@ +/* Test code generation of vector built-ins. We don't have this for + most of ours today. As new built-ins are added, please add to this + test case. Update as necessary to add VSX, P8-vector, P9-vector, + etc. */ + +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O0" } */ + +#include + +static vector signed int i, *pi; +static int int1; + +void +b() +{ + i = __builtin_altivec_lvxl (int1, pi); + i = vec_lvxl (int1, pi); +} + +/* { dg-final { scan-assembler-times "lvxl" 2 } } */ -- 2.47.2