From 020708443d6bbb288f53da32faa2d76dbdb8d0dd Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Wed, 16 Nov 2022 14:40:46 +0100 Subject: [PATCH] arm: improve tests for vqdmul* gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve tests. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise. --- .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulhq_m_s16.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulhq_m_s32.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulhq_m_s8.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulhq_n_s16.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulhq_n_s32.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulhq_n_s8.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulhq_s16.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulhq_s32.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulhq_s8.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmullbq_m_s16.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmullbq_m_s32.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmullbq_n_s16.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmullbq_n_s32.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmullbq_s16.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmullbq_s32.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulltq_m_s16.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulltq_m_s32.c | 26 ++++++++++++++++--- .../arm/mve/intrinsics/vqdmulltq_n_s16.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulltq_n_s32.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulltq_s16.c | 16 ++++++++++-- .../arm/mve/intrinsics/vqdmulltq_s32.c | 16 ++++++++++-- 28 files changed, 504 insertions(+), 84 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c index 57ab85eaf524..a5c1a1062059 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqdmulhq_m_n_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqdmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c index 256353a0a212..c78d4db15916 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqdmulhq_m_n_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqdmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c index c24be9ed5ad1..b5ab6eb292c2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) { return vqdmulhq_m_n_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) { return vqdmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c index 49efeefcf637..2f5fb0e53a4c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmulhq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c index a5614830622a..80a938a8a5bd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmulhq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c index 2e016f57e35a..bfb755af4ee7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqdmulhq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqdmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulht.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c index 19534b60b276..e34689d203db 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16_t b) { return vqdmulhq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ +/* +**foo1: +** ... +** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16_t b) { return vqdmulhq (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c index eff9f6ecc4b4..f967b8a286aa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vqdmulhq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ +/* +**foo1: +** ... +** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vqdmulhq (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c index 188cf7c616fc..5e1928fd51b1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8_t b) { return vqdmulhq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ +/* +**foo1: +** ... +** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8_t b) { return vqdmulhq (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c index 513a30f67e61..7c0a434e48f1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vqdmulhq_s16 (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ +/* +**foo1: +** ... +** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vqdmulhq (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c index 9cf147dc7c56..19f4b03f6f09 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vqdmulhq_s32 (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ +/* +**foo1: +** ... +** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vqdmulhq (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c index 87211ad054a0..1784c967f3c3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vqdmulhq_s8 (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ +/* +**foo1: +** ... +** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vqdmulhq (a, b); } -/* { dg-final { scan-assembler "vqdmulh.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c index f0a4ad5b9f44..4f96e192732a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqdmullbq_m_n_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqdmullbq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c index 1c7b2e4a1fcb..d0bca6e30150 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqdmullbq_m_n_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqdmullbq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c index 6a056cf86a18..8448cdc88cf2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmullbq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmullbq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c index 019c536e7f2e..48cddcd791e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmullbq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmullbq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c index ec501c345397..cd7c394139db 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16_t b) { return vqdmullbq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ +/* +**foo1: +** ... +** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16_t b) { return vqdmullbq (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c index 78fe3d6b289d..b4d82f559871 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32_t b) { return vqdmullbq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ +/* +**foo1: +** ... +** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32_t b) { return vqdmullbq (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c index 9a423d3cc668..6f0fdabf67f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16x8_t b) { return vqdmullbq_s16 (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ +/* +**foo1: +** ... +** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16x8_t b) { return vqdmullbq (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c index f0278cd8a86a..2bf952bfd779 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32x4_t b) { return vqdmullbq_s32 (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ +/* +**foo1: +** ... +** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32x4_t b) { return vqdmullbq (a, b); } -/* { dg-final { scan-assembler "vqdmullb.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c index 85f03149da47..6c756ebf3e72 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqdmulltq_m_n_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) { return vqdmulltq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c index 6bb5004e2011..e46f6b2c3849 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqdmulltq_m_n_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vqdmulltq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c index a85393b5bc1c..8526b3ad628c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmulltq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqdmulltq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c index 82f25b2ebbe4..809e0740e462 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c @@ -1,23 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmulltq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqdmulltq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c index f9ad32a8411d..44f0036bc510 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16_t b) { return vqdmulltq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ +/* +**foo1: +** ... +** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16_t b) { return vqdmulltq (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c index 311b023431e0..b025886ff15d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32_t b) { return vqdmulltq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ +/* +**foo1: +** ... +** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32_t b) { return vqdmulltq (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c index 851f27a63b64..950848763495 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, int16x8_t b) { return vqdmulltq_s16 (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ +/* +**foo1: +** ... +** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, int16x8_t b) { return vqdmulltq (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c index 1e81cc3dea52..ab27aeddc290 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c @@ -1,21 +1,33 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int32x4_t a, int32x4_t b) { return vqdmulltq_s32 (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ +/* +**foo1: +** ... +** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int32x4_t a, int32x4_t b) { return vqdmulltq (a, b); } -/* { dg-final { scan-assembler "vqdmullt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file -- 2.47.2