From 052290cdea512d06ad98810df64f253831e79eb9 Mon Sep 17 00:00:00 2001 From: Teresa Remmet Date: Wed, 1 Oct 2025 14:43:28 +0200 Subject: [PATCH] arm64: dts: imx8mm-phygate-tauri-l: Update pad ctl for USB OC pin Disable Hysteresis Enable Field in pad ctl register for USB OC pin as this is more appropriate for the signal form in our case. Signed-off-by: Teresa Remmet Reviewed-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts index 755cf9cacd227..2ecc8b3c67dab 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts @@ -452,7 +452,7 @@ pinctrl_usbotg1: usbotg1grp { fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x80 + MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x00 >; }; -- 2.47.3