From 05e1cda2bd6ef370de19599d174c1146bd730ccf Mon Sep 17 00:00:00 2001 From: Juergen Christ Date: Mon, 15 Sep 2025 12:13:22 +0200 Subject: [PATCH] s390x: Fix fmin/fmax patterns s390x floating point minimum and maximum functions unfortunately do not canonicalize NaNs. Hence, test pr105414.c fails since c476f554e3f. Fix this by only allowing fmin/fmax pattern if signaling NaNs are disabled. gcc/ChangeLog: * config/s390/vector.md (fmax3): Restrict to no trapping math. (fmin3): Ditto. gcc/testsuite/ChangeLog: * gcc.target/s390/fminmax-1.c: Disable for signaling NaNs. * gcc.target/s390/fminmax-2.c: Ditto. * gcc.target/s390/vector/reduc-minmax-1.c: Ditto. Signed-off-by: Juergen Christ --- gcc/config/s390/vector.md | 8 ++++---- gcc/testsuite/gcc.target/s390/fminmax-1.c | 2 +- gcc/testsuite/gcc.target/s390/fminmax-2.c | 2 +- gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 205ead2ca9d..375e3e81ae1 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -3663,7 +3663,7 @@ (match_operand:VFT_BFP 2 "register_operand") (const_int 4)] UNSPEC_FMAX))] - "TARGET_VXE") + "TARGET_VXE && !flag_signaling_nans") ; fmin (define_expand "fmin3" @@ -3672,7 +3672,7 @@ (match_operand:VFT_BFP 2 "register_operand") (const_int 4)] UNSPEC_FMIN))] - "TARGET_VXE") + "TARGET_VXE && !flag_signaling_nans") ; reduc_plus (define_expand "reduc_plus_scal_" @@ -3764,7 +3764,7 @@ (unspec:V2DF [(match_dup 1) (match_dup 2) (const_int 4)] REDUC_FMINMAX)) (set (match_operand:DF 0 "register_operand" "") (vec_select:DF (match_dup 3) (parallel [(const_int 0)])))] - "TARGET_VX" + "TARGET_VX && !flag_trapping_math" { operands[2] = gen_reg_rtx (V2DFmode); operands[3] = gen_reg_rtx (V2DFmode); @@ -3787,7 +3787,7 @@ (unspec:V4SF [(match_dup 3) (match_dup 4) (const_int 4)] REDUC_FMINMAX)) (set (match_operand:SF 0 "register_operand") (vec_select:SF (match_dup 5) (parallel [(const_int 0)])))] - "TARGET_VXE" + "TARGET_VXE && !flag_trapping_math" { operands[2] = gen_reg_rtx (V4SFmode); operands[3] = gen_reg_rtx (V4SFmode); diff --git a/gcc/testsuite/gcc.target/s390/fminmax-1.c b/gcc/testsuite/gcc.target/s390/fminmax-1.c index df10905f037..756a19970a5 100644 --- a/gcc/testsuite/gcc.target/s390/fminmax-1.c +++ b/gcc/testsuite/gcc.target/s390/fminmax-1.c @@ -1,7 +1,7 @@ /* Check fmin/fmax expanders for scalars on VXE targets. */ /* { dg-do compile } */ -/* { dg-options "-O2 -march=z14 -mzarch" } */ +/* { dg-options "-O2 -march=z14 -mzarch -fno-trapping-math" } */ /* { dg-final { check-function-bodies "**" "" } } */ /* diff --git a/gcc/testsuite/gcc.target/s390/fminmax-2.c b/gcc/testsuite/gcc.target/s390/fminmax-2.c index ea37a0a821d..ac090c65d1b 100644 --- a/gcc/testsuite/gcc.target/s390/fminmax-2.c +++ b/gcc/testsuite/gcc.target/s390/fminmax-2.c @@ -1,7 +1,7 @@ /* Check fmin/fmax expanders for scalars on non-VXE targets. */ /* { dg-do compile } */ -/* { dg-options "-O2 -march=z13 -mzarch" } */ +/* { dg-options "-O2 -march=z13 -mzarch -fno-trapping-math" } */ /* { dg-final { scan-assembler-times "jg" 4 } } */ double diff --git a/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c b/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c index 5295250dcb7..7f4d16a03dd 100644 --- a/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c +++ b/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -mzarch -march=z14 -ftree-vectorize -fdump-tree-optimized" } */ +/* { dg-options "-O3 -mzarch -march=z14 -ftree-vectorize -fdump-tree-optimized -fno-trapping-math" } */ #define MAX(a, b) ((a) > (b) ? (a) : (b)) #define MIN(a, b) ((a) > (b) ? (b) : (a)) -- 2.47.3