From 07e2576d6f344acab338deeb051845c90c1cf6a3 Mon Sep 17 00:00:00 2001 From: Raphael Zinsly Date: Thu, 20 Apr 2023 08:48:08 -0600 Subject: [PATCH] [PR target/108248] [RISC-V] Break down some bitmanip insn types This is primarily Raphael's work. All I did was adjust it to apply to the trunk and add the new types to generic.md's scheduling model. The basic idea here is to make sure we have the ability to schedule the bitmanip instructions with a finer degree of control. Some of the bitmanip instructions are likely to have differing scheduler characteristics across different implementations. So rather than assign these instructions a generic "bitmanip" type, this patch assigns them a type based on their RTL code by using the iterator for the type. Naturally we have to add a few new types. It affects clz, ctz, cpop, min, max. We didn't do this for things like shNadd, single bit manipulation, etc. We certainly could if the needs presents itself. I threw all the new types into the generic_alu bucket in the generic scheduling model. Seems as good a place as any. Someone who knows the sifive uarch should probably add these types (and bitmanip) to the sifive scheduling model. We also noticed that the recently added orc.b didn't have a type at all. So we added it as a generic bitmanip type. This has been bootstrapped in a gcc-12 base and I've built and run the testsuite without regressions on the trunk. Given it was primarily Raphael's work I could probably approve & commit it. But I'd like to give the other RISC-V folks a chance to chime in. PR target/108248 gcc/ * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use as the type to allow for fine grained control of scheduling these insns. * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt, min, max. * config/riscv/riscv.md (type attribute): Add types for clz, ctz, pcnt, signed and unsigned min/max. --- gcc/config/riscv/bitmanip.md | 11 ++++++----- gcc/config/riscv/generic.md | 2 +- gcc/config/riscv/riscv.md | 1 + 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index 388ef662820d..44ad350c747b 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -241,7 +241,7 @@ (clz_ctz_pcnt:SI (match_operand:SI 1 "register_operand" "r")))] "TARGET_ZBB" "%~\t%0,%1" - [(set_attr "type" "bitmanip") + [(set_attr "type" "") (set_attr "mode" "SI")]) (define_insn "*disi2" @@ -250,7 +250,7 @@ (clz_ctz_pcnt:SI (match_operand:SI 1 "register_operand" "r"))))] "TARGET_64BIT && TARGET_ZBB" "w\t%0,%1" - [(set_attr "type" "bitmanip") + [(set_attr "type" "") (set_attr "mode" "SI")]) (define_insn "*di2" @@ -258,7 +258,7 @@ (clz_ctz_pcnt:DI (match_operand:DI 1 "register_operand" "r")))] "TARGET_64BIT && TARGET_ZBB" "\t%0,%1" - [(set_attr "type" "bitmanip") + [(set_attr "type" "") (set_attr "mode" "DI")]) (define_insn "*zero_extendhi2_bitmanip" @@ -357,7 +357,8 @@ [(set (match_operand:X 0 "register_operand" "=r") (unspec:X [(match_operand:X 1 "register_operand" "r")] UNSPEC_ORC_B))] "TARGET_ZBB" - "orc.b\t%0,%1") + "orc.b\t%0,%1" + [(set_attr "type" "bitmanip")]) (define_expand "bswapdi2" [(set (match_operand:DI 0 "register_operand") @@ -406,7 +407,7 @@ (match_operand:X 2 "reg_or_0_operand" "rJ")))] "TARGET_ZBB" "\t%0,%1,%z2" - [(set_attr "type" "bitmanip")]) + [(set_attr "type" "")]) ;; Optimize the common case of a SImode min/max against a constant ;; that is safe both for sign- and zero-extension. diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md index b98d0ae5258d..db4fabbbd924 100644 --- a/gcc/config/riscv/generic.md +++ b/gcc/config/riscv/generic.md @@ -27,7 +27,7 @@ (define_insn_reservation "generic_alu" 1 (and (eq_attr "tune" "generic") - (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move")) + (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,move,bitmanip,smin,smax,umin,umax,clz,ctz,cpop")) "alu") (define_insn_reservation "generic_load" 3 diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 1fb29da8a0ba..0c69407ac09c 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -344,6 +344,7 @@ "unknown,branch,jump,call,load,fpload,store,fpstore, mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul, fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,ghost,bitmanip,rotate, + min,max,minu,maxu,clz,ctz,cpop, atomic,condmove,crypto,rdvlenb,rdvl,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, vldux,vldox,vstux,vstox,vldff,vldr,vstr, vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp,viminmax, -- 2.47.2