From 08103e4d6ada9b57366f2df2a2b745babfab914c Mon Sep 17 00:00:00 2001 From: Xionghu Luo Date: Wed, 24 Mar 2021 19:46:12 -0500 Subject: [PATCH] rs6000: Correct Power8 cost of l2 cache size [PR97329] l2 cache size for Power8 is 512kB, it was copied from Power7 before public. Tested no performance change for SPEC2017. gcc/ChangeLog: 2021-03-24 Xionghu Luo * config/rs6000/rs6000.c (power8_costs): Change l2 cache from 256 to 512. --- gcc/config/rs6000/rs6000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 616dae35bae1..34c4edae20ea 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1055,7 +1055,7 @@ struct processor_costs power8_cost = { COSTS_N_INSNS (17), /* ddiv */ 128, /* cache line size */ 32, /* l1 cache */ - 256, /* l2 cache */ + 512, /* l2 cache */ 12, /* prefetch streams */ COSTS_N_INSNS (3), /* SF->DF convert */ }; -- 2.47.2