From 086079090571910ead0510e756cea14ff3759d4e Mon Sep 17 00:00:00 2001 From: Jagadeesh Kona Date: Fri, 22 Aug 2025 11:26:35 +0200 Subject: [PATCH] arm64: dts: qcom: sm8650: Additionally manage MXC power domain in videocc Videocc requires both MMCX and MXC rails to be powered ON to configure the video PLLs on SM8650 platform. Hence add MXC power domain to videocc node on SM8650. Reviewed-by: Dmitry Baryshkov Reviewed-by: Bryan O'Donoghue Reviewed-by: Konrad Dybcio Signed-off-by: Jagadeesh Kona Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-3-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 7ffdd26ff6143..e3eabd5d17f8c 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -5236,7 +5236,8 @@ reg = <0 0x0aaf0000 0 0x10000>; clocks = <&bi_tcxo_div2>, <&gcc GCC_VIDEO_AHB_CLK>; - power-domains = <&rpmhpd RPMHPD_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>, + <&rpmhpd RPMHPD_MXC>; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; -- 2.47.3