From 08ff2807cfa38b7cd208d82906f21a133243abdf Mon Sep 17 00:00:00 2001 From: George Moussalem Date: Fri, 23 May 2025 11:30:35 +0400 Subject: [PATCH] qualcommax: ipq50xx: backport upstreamed patches for IPQ5018 PCIe support Use upstreamed patches for IPQ5018 PCIe support, including patches for phy and controller drivers and dts nodes. Signed-off-by: George Moussalem Link: https://github.com/openwrt/openwrt/pull/18884 Signed-off-by: Robert Marko --- ...m-Introduce-PCIe-UNIPHY-28LP-driver.patch} | 32 +++-- ...-uniphy-pcie-28LP-add-support-for-I.patch} | 23 ++-- ...16-PCI-qcom-Add-support-for-IPQ5018.patch} | 0 ...qcom-ipq5018-Add-PCIe-related-nodes.patch} | 110 ++---------------- ...0154-dts-qcom-IPQ5018-add-tsens-node.patch | 4 +- ...com-uniphy-pcie-Document-PCIe-uniphy.patch | 85 -------------- ...m-uniphy-pcie-add-IPQ5018-compatible.patch | 25 ---- ...64-dts-qcom-ipq5018-Add-crypto-nodes.patch | 2 +- ...arm64-dts-qcom-ipq5018-Add-PRNG-node.patch | 2 +- ...s-qcom-ipq5018-Add-ethernet-cmn-node.patch | 2 +- ...arm64-dts-qcom-ipq5018-add-mdio-node.patch | 2 +- ...m64-dts-qcom-ipq5018-add-ge_phy-node.patch | 2 +- 12 files changed, 55 insertions(+), 234 deletions(-) rename target/linux/qualcommax/patches-6.12/{0156-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch => 0045-v6.16-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch} (91%) rename target/linux/qualcommax/patches-6.12/{0158-phy-qcom-uniphy-pcie-28lp-add-support-for-IPQ5018.patch => 0046-v6.16-phy-qualcomm-qcom-uniphy-pcie-28LP-add-support-for-I.patch} (66%) rename target/linux/qualcommax/patches-6.12/{0048-v6.16-PCI-qcom-Add-support-for-IPQ5018.patch => 0047-v6.16-PCI-qcom-Add-support-for-IPQ5018.patch} (100%) rename target/linux/qualcommax/patches-6.12/{0162-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch => 0048-v6.16-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch} (58%) delete mode 100644 target/linux/qualcommax/patches-6.12/0155-dt-bindings-phy-qcom-uniphy-pcie-Document-PCIe-uniphy.patch delete mode 100644 target/linux/qualcommax/patches-6.12/0157-dt-bindings-phy-qcom-uniphy-pcie-add-IPQ5018-compatible.patch diff --git a/target/linux/qualcommax/patches-6.12/0156-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch b/target/linux/qualcommax/patches-6.12/0045-v6.16-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch similarity index 91% rename from target/linux/qualcommax/patches-6.12/0156-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch rename to target/linux/qualcommax/patches-6.12/0045-v6.16-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch index f30db1463f6..622b3888bb0 100644 --- a/target/linux/qualcommax/patches-6.12/0156-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch +++ b/target/linux/qualcommax/patches-6.12/0045-v6.16-phy-qcom-Introduce-PCIe-UNIPHY-28LP-driver.patch @@ -1,16 +1,23 @@ -From: Varadarajan Narayanan -Date: Thu, 2 Jan 2025 17:00:16 +0530 -Subject: [PATCH] phy: qcom: Introduce PCIe UNIPHY 28LP driver - +From 74badb8b0b146668cc6c03eb58e2a814f9463d02 Mon Sep 17 00:00:00 2001 From: Nitheesh Sekar +Date: Thu, 20 Feb 2025 15:12:46 +0530 +Subject: [PATCH] phy: qcom: Introduce PCIe UNIPHY 28LP driver -Add Qualcomm PCIe UNIPHY 28LP driver support present -in Qualcomm IPQ5332 SoC and the phy init sequence. +Add Qualcomm PCIe UNIPHY 28LP driver support present in Qualcomm IPQ5332 +SoC and the phy init sequence. Reviewed-by: Dmitry Baryshkov Signed-off-by: Nitheesh Sekar Signed-off-by: Varadarajan Narayanan +Link: https://lore.kernel.org/r/20250220094251.230936-3-quic_varada@quicinc.com +Signed-off-by: Vinod Koul --- + drivers/phy/qualcomm/Kconfig | 12 + + drivers/phy/qualcomm/Makefile | 1 + + .../phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c | 286 ++++++++++++++++++ + 3 files changed, 299 insertions(+) + create mode 100644 drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c + --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -154,6 +154,18 @@ config PHY_QCOM_M31_USB @@ -44,7 +51,7 @@ Signed-off-by: Varadarajan Narayanan obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c -@@ -0,0 +1,285 @@ +@@ -0,0 +1,286 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025, The Linux Foundation. All rights reserved. @@ -63,6 +70,7 @@ Signed-off-by: Varadarajan Narayanan +#include +#include +#include ++#include + +#define RST_ASSERT_DELAY_MIN_US 100 +#define RST_ASSERT_DELAY_MAX_US 150 @@ -89,8 +97,6 @@ Signed-off-by: Varadarajan Narayanan +#define PHY_CFG_EIOS_DTCT_REG 0x3e4 +#define PHY_CFG_GEN3_ALIGN_HOLDOFF_TIME 0x3e8 + -+#define PHY_MODE_FIXED 0x1 -+ +enum qcom_uniphy_pcie_type { + PHY_TYPE_PCIE = 1, + PHY_TYPE_PCIE_GEN2, @@ -141,7 +147,7 @@ Signed-off-by: Varadarajan Narayanan + .phy_type = PHY_TYPE_PCIE_GEN3, + .init_seq = ipq5332_regs, + .init_seq_num = ARRAY_SIZE(ipq5332_regs), -+ .pipe_clk_rate = 250000000, ++ .pipe_clk_rate = 250 * MEGA, +}; + +static void qcom_uniphy_pcie_init(struct qcom_uniphy_pcie *phy) @@ -200,6 +206,7 @@ Signed-off-by: Varadarajan Narayanan + usleep_range(CLK_EN_DELAY_MIN_US, CLK_EN_DELAY_MAX_US); + + qcom_uniphy_pcie_init(phy); ++ + return 0; +} + @@ -292,8 +299,9 @@ Signed-off-by: Varadarajan Narayanan + if (!phy->data) + return -EINVAL; + -+ phy->lanes = 1; -+ ret = of_property_read_u32(dev->of_node, "num-lanes", &phy->lanes); ++ ret = of_property_read_u32(dev_of_node(dev), "num-lanes", &phy->lanes); ++ if (ret) ++ return dev_err_probe(dev, ret, "Couldn't read num-lanes\n"); + + ret = qcom_uniphy_pcie_get_resources(pdev, phy); + if (ret < 0) diff --git a/target/linux/qualcommax/patches-6.12/0158-phy-qcom-uniphy-pcie-28lp-add-support-for-IPQ5018.patch b/target/linux/qualcommax/patches-6.12/0046-v6.16-phy-qualcomm-qcom-uniphy-pcie-28LP-add-support-for-I.patch similarity index 66% rename from target/linux/qualcommax/patches-6.12/0158-phy-qcom-uniphy-pcie-28lp-add-support-for-IPQ5018.patch rename to target/linux/qualcommax/patches-6.12/0046-v6.16-phy-qualcomm-qcom-uniphy-pcie-28LP-add-support-for-I.patch index aedb9598734..4c727fcc611 100644 --- a/target/linux/qualcommax/patches-6.12/0158-phy-qcom-uniphy-pcie-28lp-add-support-for-IPQ5018.patch +++ b/target/linux/qualcommax/patches-6.12/0046-v6.16-phy-qualcomm-qcom-uniphy-pcie-28LP-add-support-for-I.patch @@ -1,15 +1,24 @@ -From: George Moussalem -Date: Tue, 07 Jan 2025 17:34:13 +0400 -Subject: [PATCH] phy: qualcomm: qcom-uniphy-pcie 28lp add support for IPQ5018 +From dfc820d2f8a8ea90bbc02269b5362e3678e58cac Mon Sep 17 00:00:00 2001 +From: Nitheesh Sekar +Date: Wed, 26 Mar 2025 12:10:56 +0400 +Subject: [PATCH] phy: qualcomm: qcom-uniphy-pcie 28LP add support for IPQ5018 -The Qualcomm UNIPHY PCIe PHY 28lp is found on both IPQ5332 and IPQ5018. +The Qualcomm UNIPHY PCIe PHY 28LP is found on both IPQ5332 and IPQ5018. Adding the PHY init sequence, pipe clock rate, and compatible for IPQ5018. +Signed-off-by: Nitheesh Sekar +Signed-off-by: Sricharan Ramabadhran +Reviewed-by: Dmitry Baryshkov Signed-off-by: George Moussalem +Link: https://lore.kernel.org/r/20250326-ipq5018-pcie-v7-2-e1828fef06c9@outlook.com +Signed-off-by: Vinod Koul --- + .../phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c | 45 +++++++++++++++++++ + 1 file changed, 45 insertions(+) + --- a/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-pcie-28lp.c -@@ -76,6 +76,40 @@ struct qcom_uniphy_pcie { +@@ -75,6 +75,40 @@ struct qcom_uniphy_pcie { #define phy_to_dw_phy(x) container_of((x), struct qca_uni_pcie_phy, phy) @@ -50,7 +59,7 @@ Signed-off-by: George Moussalem static const struct qcom_uniphy_pcie_regs ipq5332_regs[] = { { .offset = PHY_CFG_PLLCFG, -@@ -89,6 +123,14 @@ static const struct qcom_uniphy_pcie_reg +@@ -88,6 +122,14 @@ static const struct qcom_uniphy_pcie_reg }, }; @@ -59,7 +68,7 @@ Signed-off-by: George Moussalem + .phy_type = PHY_TYPE_PCIE_GEN2, + .init_seq = ipq5018_regs, + .init_seq_num = ARRAY_SIZE(ipq5018_regs), -+ .pipe_clk_rate = 125000000, ++ .pipe_clk_rate = 125 * MEGA, +}; + static const struct qcom_uniphy_pcie_data ipq5332_data = { diff --git a/target/linux/qualcommax/patches-6.12/0048-v6.16-PCI-qcom-Add-support-for-IPQ5018.patch b/target/linux/qualcommax/patches-6.12/0047-v6.16-PCI-qcom-Add-support-for-IPQ5018.patch similarity index 100% rename from target/linux/qualcommax/patches-6.12/0048-v6.16-PCI-qcom-Add-support-for-IPQ5018.patch rename to target/linux/qualcommax/patches-6.12/0047-v6.16-PCI-qcom-Add-support-for-IPQ5018.patch diff --git a/target/linux/qualcommax/patches-6.12/0162-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch b/target/linux/qualcommax/patches-6.12/0048-v6.16-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch similarity index 58% rename from target/linux/qualcommax/patches-6.12/0162-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch rename to target/linux/qualcommax/patches-6.12/0048-v6.16-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch index 9ef5e111fdf..a7fceeba653 100644 --- a/target/linux/qualcommax/patches-6.12/0162-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch +++ b/target/linux/qualcommax/patches-6.12/0048-v6.16-arm64-dts-qcom-ipq5018-Add-PCIe-related-nodes.patch @@ -1,95 +1,7 @@ -From patchwork Sat Apr 26 08:47:20 2025 -Content-Type: text/plain; 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- Sat, 26 Apr 2025 08:47:50 +0000 (UTC) -Date: Sat, 26 Apr 2025 12:47:20 +0400 -Subject: [PATCH v9 1/2] arm64: dts: qcom: ipq5018: Add PCIe related nodes -Precedence: bulk -X-Mailing-List: linux-arm-msm@vger.kernel.org -List-Id: -List-Subscribe: -List-Unsubscribe: -MIME-Version: 1.0 -Message-Id: <20250426-ipq5018-pcie-v9-1-1f0dca6c205b@outlook.com> -References: <20250426-ipq5018-pcie-v9-0-1f0dca6c205b@outlook.com> -In-Reply-To: <20250426-ipq5018-pcie-v9-0-1f0dca6c205b@outlook.com> -To: Vinod Koul , - Kishon Vijay Abraham I , Rob Herring , - Krzysztof Kozlowski , - Conor Dooley , - Nitheesh Sekar , - Varadarajan Narayanan , - Bjorn Helgaas , - Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= - =?utf-8?q?=C5=84ski?= , - Manivannan Sadhasivam , - Bjorn Andersson , - Konrad Dybcio , - Praveenkumar I -Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, - devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - linux-pci@vger.kernel.org, George Moussalem , - 20250317100029.881286-1-quic_varada@quicinc.com, - 20250317100029.881286-2-quic_varada@quicinc.com, - Sricharan R , - Dmitry Baryshkov , - Konrad Dybcio -X-Mailer: b4 0.14.2 -X-Developer-Signature: v=1; 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IPQ5018 has 8 MSI SPI interrupts and @@ -103,14 +15,16 @@ Reviewed-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: George Moussalem +Link: https://lore.kernel.org/r/20250514-ipq5018-pcie-v10-1-5b42a8eff7ea@outlook.com +Signed-off-by: Bjorn Andersson --- - arch/arm64/boot/dts/qcom/ipq5018.dtsi | 238 +++++++++++++++++++++++++++++++++- - 1 file changed, 236 insertions(+), 2 deletions(-) + arch/arm64/boot/dts/qcom/ipq5018.dtsi | 240 +++++++++++++++++++++++++- + 1 file changed, 238 insertions(+), 2 deletions(-) --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -258,6 +258,40 @@ - #thermal-sensor-cells = <1>; +@@ -147,6 +147,40 @@ + status = "disabled"; }; + pcie1_phy: phy@7e000 { @@ -150,7 +64,7 @@ Signed-off-by: George Moussalem tlmm: pinctrl@1000000 { compatible = "qcom,ipq5018-tlmm"; reg = <0x01000000 0x300000>; -@@ -281,8 +315,8 @@ +@@ -170,8 +204,8 @@ reg = <0x01800000 0x80000>; clocks = <&xo_board_clk>, <&sleep_clk>, @@ -161,7 +75,7 @@ Signed-off-by: George Moussalem <0>, <0>, <0>, -@@ -498,6 +532,208 @@ +@@ -387,6 +421,208 @@ status = "disabled"; }; }; @@ -369,4 +283,4 @@ Signed-off-by: George Moussalem + }; }; - thermal-zones { + timer { diff --git a/target/linux/qualcommax/patches-6.12/0154-dts-qcom-IPQ5018-add-tsens-node.patch b/target/linux/qualcommax/patches-6.12/0154-dts-qcom-IPQ5018-add-tsens-node.patch index 0823fb75daa..b712e9ce5d3 100644 --- a/target/linux/qualcommax/patches-6.12/0154-dts-qcom-IPQ5018-add-tsens-node.patch +++ b/target/linux/qualcommax/patches-6.12/0154-dts-qcom-IPQ5018-add-tsens-node.patch @@ -15,7 +15,7 @@ Signed-off-by: Sricharan Ramabadhran --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -147,6 +147,117 @@ +@@ -181,6 +181,117 @@ status = "disabled"; }; @@ -133,7 +133,7 @@ Signed-off-by: Sricharan Ramabadhran tlmm: pinctrl@1000000 { compatible = "qcom,ipq5018-tlmm"; reg = <0x01000000 0x300000>; -@@ -388,6 +499,64 @@ +@@ -624,6 +735,64 @@ }; }; }; diff --git a/target/linux/qualcommax/patches-6.12/0155-dt-bindings-phy-qcom-uniphy-pcie-Document-PCIe-uniphy.patch b/target/linux/qualcommax/patches-6.12/0155-dt-bindings-phy-qcom-uniphy-pcie-Document-PCIe-uniphy.patch deleted file mode 100644 index 7997976d7c7..00000000000 --- a/target/linux/qualcommax/patches-6.12/0155-dt-bindings-phy-qcom-uniphy-pcie-Document-PCIe-uniphy.patch +++ /dev/null @@ -1,85 +0,0 @@ -From: Varadarajan Narayanan -Date: Thu, 2 Jan 2025 17:00:15 +0530 -Subject: [PATCH] dt-bindings: phy: qcom,uniphy-pcie: Document PCIe uniphy - -From: Nitheesh Sekar - -Document the Qualcomm UNIPHY PCIe 28LP present in IPQ5332. - -Signed-off-by: Nitheesh Sekar -Signed-off-by: Varadarajan Narayanan ---- ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml -@@ -0,0 +1,71 @@ -+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/phy/qcom,ipq5332-uniphy-pcie-phy.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Qualcomm UNIPHY PCIe 28LP PHY -+ -+maintainers: -+ - Nitheesh Sekar -+ - Varadarajan Narayanan -+ -+description: -+ PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC -+ -+properties: -+ compatible: -+ enum: -+ - qcom,ipq5332-uniphy-pcie-phy -+ -+ reg: -+ maxItems: 1 -+ -+ clocks: -+ items: -+ - description: pcie pipe clock -+ - description: pcie ahb clock -+ -+ resets: -+ items: -+ - description: phy reset -+ - description: ahb reset -+ - description: cfg reset -+ -+ "#phy-cells": -+ const: 0 -+ -+ "#clock-cells": -+ const: 0 -+ -+ num-lanes: true -+ -+required: -+ - compatible -+ - reg -+ - clocks -+ - resets -+ - "#phy-cells" -+ - "#clock-cells" -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ -+ pcie0_phy: phy@4b0000 { -+ compatible = "qcom,ipq5332-uniphy-pcie-phy"; -+ reg = <0x004b0000 0x800>; -+ -+ clocks = <&gcc GCC_PCIE3X1_0_PIPE_CLK>, -+ <&gcc GCC_PCIE3X1_PHY_AHB_CLK>; -+ -+ resets = <&gcc GCC_PCIE3X1_0_PHY_BCR>, -+ <&gcc GCC_PCIE3X1_PHY_AHB_CLK_ARES>, -+ <&gcc GCC_PCIE3X1_0_PHY_PHY_BCR>; -+ -+ #clock-cells = <0>; -+ -+ #phy-cells = <0>; -+ }; diff --git a/target/linux/qualcommax/patches-6.12/0157-dt-bindings-phy-qcom-uniphy-pcie-add-IPQ5018-compatible.patch b/target/linux/qualcommax/patches-6.12/0157-dt-bindings-phy-qcom-uniphy-pcie-add-IPQ5018-compatible.patch deleted file mode 100644 index 9951daa8f70..00000000000 --- a/target/linux/qualcommax/patches-6.12/0157-dt-bindings-phy-qcom-uniphy-pcie-add-IPQ5018-compatible.patch +++ /dev/null @@ -1,25 +0,0 @@ -From: George Moussalem -Date: Tue, 07 Jan 2025 17:34:13 +0400 -Subject: [PATCH] phy: qualcomm: qcom-uniphy-pcie add IPQ5018 compatible - -The Qualcomm UNIPHY PCIe PHY 28lp part of the IPQ5332 SoC is also present on -the IPQ5018 SoC, so adding the compatible for IPQ5018. - -Signed-off-by: George Moussalem ---- ---- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml -+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml -@@ -11,11 +11,12 @@ maintainers: - - Varadarajan Narayanan - - description: -- PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC -+ PCIe and USB combo PHY found in Qualcomm IPQ5018 and IPQ5332 SoCs - - properties: - compatible: - enum: -+ - qcom,ipq5018-uniphy-pcie-phy - - qcom,ipq5332-uniphy-pcie-phy - - reg: diff --git a/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch b/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch index 89a2ebd15a8..135624d97ac 100644 --- a/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch +++ b/target/linux/qualcommax/patches-6.12/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch @@ -9,7 +9,7 @@ Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -293,6 +293,30 @@ - status = "disabled"; + #thermal-sensor-cells = <1>; }; + cryptobam: dma-controller@704000 { diff --git a/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch b/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch index 9666bb8f310..1154e636893 100644 --- a/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch +++ b/target/linux/qualcommax/patches-6.12/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch @@ -8,7 +8,7 @@ Signed-off-by: George Moussalem --- --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -220,6 +220,14 @@ +@@ -254,6 +254,14 @@ }; }; diff --git a/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch b/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch index 3d00def55f4..6d0e7942798 100644 --- a/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch +++ b/target/linux/qualcommax/patches-6.12/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch @@ -23,7 +23,7 @@ Signed-off-by: Ziyang Huang sleep_clk: sleep-clk { compatible = "fixed-clock"; #clock-cells = <0>; -@@ -148,6 +154,19 @@ +@@ -182,6 +188,19 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0712-arm64-dts-qcom-ipq5018-add-mdio-node.patch b/target/linux/qualcommax/patches-6.12/0712-arm64-dts-qcom-ipq5018-add-mdio-node.patch index b326765e6ce..a5128db895c 100644 --- a/target/linux/qualcommax/patches-6.12/0712-arm64-dts-qcom-ipq5018-add-mdio-node.patch +++ b/target/linux/qualcommax/patches-6.12/0712-arm64-dts-qcom-ipq5018-add-mdio-node.patch @@ -14,7 +14,7 @@ Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -154,6 +154,30 @@ +@@ -188,6 +188,30 @@ status = "disabled"; }; diff --git a/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-ge_phy-node.patch b/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-ge_phy-node.patch index 6d2751c06d5..d449e09767d 100644 --- a/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-ge_phy-node.patch +++ b/target/linux/qualcommax/patches-6.12/0713-arm64-dts-qcom-ipq5018-add-ge_phy-node.patch @@ -13,7 +13,7 @@ Signed-off-by: George Moussalem --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi -@@ -164,6 +164,21 @@ +@@ -198,6 +198,21 @@ clock-names = "gcc_mdio_ahb_clk"; status = "disabled"; -- 2.47.2