From 0f119592f778d19f92cd8fc2bbe674136c3f6a4c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sun, 16 Jul 2023 21:22:57 +0200 Subject: [PATCH] 6.4-stable patches added patches: drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch drm-amdgpu-sdma4-set-align-mask-to-255.patch drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch --- ...bnormal-fan-detection-for-smu-13.0.0.patch | 33 ++++++ ...gs-for-thunderbolt-attached-scenario.patch | 51 ++++++++ ...check-ras-irq-existence-for-vcn-jpeg.patch | 48 ++++++++ ...s-are-locked-in-amdgpu_vm_get_memory.patch | 110 ++++++++++++++++++ ...e-sure-that-bos-have-a-backing-store.patch | 42 +++++++ ...m-amdgpu-sdma4-set-align-mask-to-255.patch | 67 +++++++++++ ...-mark-offset-for-high-priority-rings.patch | 37 ++++++ queue-6.4/series | 7 ++ 8 files changed, 395 insertions(+) create mode 100644 queue-6.4/drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch create mode 100644 queue-6.4/drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch create mode 100644 queue-6.4/drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch create mode 100644 queue-6.4/drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch create mode 100644 queue-6.4/drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch create mode 100644 queue-6.4/drm-amdgpu-sdma4-set-align-mask-to-255.patch create mode 100644 queue-6.4/drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch diff --git a/queue-6.4/drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch b/queue-6.4/drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch new file mode 100644 index 00000000000..6529b693e4a --- /dev/null +++ b/queue-6.4/drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch @@ -0,0 +1,33 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:18 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:31 -0400 +Subject: drm/amd/pm: add abnormal fan detection for smu 13.0.0 +To: +Cc: , Kenneth Feng , "Evan Quan" , Alex Deucher +Message-ID: <20230707150734.746135-6-alexander.deucher@amd.com> + +From: Kenneth Feng + +commit 2da0036ea99bccb27f7fe3cf2aa2900860e9be46 upstream + +add abnormal fan detection for smu 13.0.0 + +Signed-off-by: Kenneth Feng +Reviewed-by: Evan Quan +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.1.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +@@ -1300,6 +1300,7 @@ static int smu_v13_0_0_get_thermal_tempe + range->mem_emergency_max = (pptable->SkuTable.TemperatureLimit[TEMP_MEM] + CTF_OFFSET_MEM)* + SMU_TEMPERATURE_UNITS_PER_CENTIGRADES; + range->software_shutdown_temp = powerplay_table->software_shutdown_temp; ++ range->software_shutdown_temp_offset = pptable->SkuTable.FanAbnormalTempLimitOffset; + + return 0; + } diff --git a/queue-6.4/drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch b/queue-6.4/drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch new file mode 100644 index 00000000000..92bc5a76e56 --- /dev/null +++ b/queue-6.4/drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch @@ -0,0 +1,51 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:25 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:29 -0400 +Subject: drm/amd/pm: revise the ASPM settings for thunderbolt attached scenario +To: +Cc: , Evan Quan , Alex Deucher +Message-ID: <20230707150734.746135-4-alexander.deucher@amd.com> + +From: Evan Quan + +commit fd21987274463a439c074b8f3c93d3b132e4c031 upstream + +Also, correct the comment for NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT +as 0x0000000E stands for 400ms instead of 4ms. + +Signed-off-by: Evan Quan +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c +@@ -346,7 +346,7 @@ static void nbio_v2_3_init_registers(str + + #define NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT 0x00000000 // off by default, no gains over L1 + #define NAVI10_PCIE__LC_L1_INACTIVITY_DEFAULT 0x00000009 // 1=1us, 9=1ms +-#define NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT 0x0000000E // 4ms ++#define NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT 0x0000000E // 400ms + + static void nbio_v2_3_enable_aspm(struct amdgpu_device *adev, + bool enable) +@@ -479,9 +479,12 @@ static void nbio_v2_3_program_aspm(struc + WREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP5, data); + + def = data = RREG32_PCIE(smnPCIE_LC_CNTL); +- data &= ~PCIE_LC_CNTL__LC_L0S_INACTIVITY_MASK; +- data |= 0x9 << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT; +- data |= 0x1 << PCIE_LC_CNTL__LC_PMI_TO_L1_DIS__SHIFT; ++ data |= NAVI10_PCIE__LC_L0S_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT; ++ if (pci_is_thunderbolt_attached(adev->pdev)) ++ data |= NAVI10_PCIE__LC_L1_INACTIVITY_TBT_DEFAULT << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT; ++ else ++ data |= NAVI10_PCIE__LC_L1_INACTIVITY_DEFAULT << PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT; ++ data &= ~PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK; + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL, data); + diff --git a/queue-6.4/drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch b/queue-6.4/drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch new file mode 100644 index 00000000000..f82f6e07d21 --- /dev/null +++ b/queue-6.4/drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch @@ -0,0 +1,48 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:18 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:32 -0400 +Subject: drm/amdgpu: check RAS irq existence for VCN/JPEG +To: +Cc: , Tao Zhou , Hawking Zhang , Alex Deucher +Message-ID: <20230707150734.746135-7-alexander.deucher@amd.com> + +From: Tao Zhou + +commit 4ff96bcc0d40b66bf3ddd6010830e9a4f9b85d53 upstream + +No RAS irq is allowed. + +Signed-off-by: Tao Zhou +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.1.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | 3 ++- + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 3 ++- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c +@@ -251,7 +251,8 @@ int amdgpu_jpeg_ras_late_init(struct amd + + if (amdgpu_ras_is_supported(adev, ras_block->block)) { + for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { +- if (adev->jpeg.harvest_config & (1 << i)) ++ if (adev->jpeg.harvest_config & (1 << i) || ++ !adev->jpeg.inst[i].ras_poison_irq.funcs) + continue; + + r = amdgpu_irq_get(adev, &adev->jpeg.inst[i].ras_poison_irq, 0); +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +@@ -1191,7 +1191,8 @@ int amdgpu_vcn_ras_late_init(struct amdg + + if (amdgpu_ras_is_supported(adev, ras_block->block)) { + for (i = 0; i < adev->vcn.num_vcn_inst; i++) { +- if (adev->vcn.harvest_config & (1 << i)) ++ if (adev->vcn.harvest_config & (1 << i) || ++ !adev->vcn.inst[i].ras_poison_irq.funcs) + continue; + + r = amdgpu_irq_get(adev, &adev->vcn.inst[i].ras_poison_irq, 0); diff --git a/queue-6.4/drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch b/queue-6.4/drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch new file mode 100644 index 00000000000..35248fcbb80 --- /dev/null +++ b/queue-6.4/drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch @@ -0,0 +1,110 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:14 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:26 -0400 +Subject: drm/amdgpu: make sure BOs are locked in amdgpu_vm_get_memory +To: +Cc: mario.limonciello@amd.com, "Christian König" , "Alex Deucher" , "Guchun Chen" , "Mikhail Gavrilov" +Message-ID: <20230707150734.746135-1-alexander.deucher@amd.com> + +From: Christian König + +commit e2ad8e2df432498b1cee2af04df605723f4d75e6 upstream. + +We need to grab the lock of the BO or otherwise can run into a crash +when we try to inspect the current location. + +Signed-off-by: Christian König +Reviewed-by: Alex Deucher +Acked-by: Guchun Chen +Tested-by: Mikhail Gavrilov +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.3.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 69 ++++++++++++++++++--------------- + 1 file changed, 39 insertions(+), 30 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -920,42 +920,51 @@ error_unlock: + return r; + } + ++static void amdgpu_vm_bo_get_memory(struct amdgpu_bo_va *bo_va, ++ struct amdgpu_mem_stats *stats) ++{ ++ struct amdgpu_vm *vm = bo_va->base.vm; ++ struct amdgpu_bo *bo = bo_va->base.bo; ++ ++ if (!bo) ++ return; ++ ++ /* ++ * For now ignore BOs which are currently locked and potentially ++ * changing their location. ++ */ ++ if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv && ++ !dma_resv_trylock(bo->tbo.base.resv)) ++ return; ++ ++ amdgpu_bo_get_memory(bo, stats); ++ if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv) ++ dma_resv_unlock(bo->tbo.base.resv); ++} ++ + void amdgpu_vm_get_memory(struct amdgpu_vm *vm, + struct amdgpu_mem_stats *stats) + { + struct amdgpu_bo_va *bo_va, *tmp; + + spin_lock(&vm->status_lock); +- list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) { +- if (!bo_va->base.bo) +- continue; +- amdgpu_bo_get_memory(bo_va->base.bo, stats); +- } +- list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) { +- if (!bo_va->base.bo) +- continue; +- amdgpu_bo_get_memory(bo_va->base.bo, stats); +- } +- list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) { +- if (!bo_va->base.bo) +- continue; +- amdgpu_bo_get_memory(bo_va->base.bo, stats); +- } +- list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) { +- if (!bo_va->base.bo) +- continue; +- amdgpu_bo_get_memory(bo_va->base.bo, stats); +- } +- list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) { +- if (!bo_va->base.bo) +- continue; +- amdgpu_bo_get_memory(bo_va->base.bo, stats); +- } +- list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) { +- if (!bo_va->base.bo) +- continue; +- amdgpu_bo_get_memory(bo_va->base.bo, stats); +- } ++ list_for_each_entry_safe(bo_va, tmp, &vm->idle, base.vm_status) ++ amdgpu_vm_bo_get_memory(bo_va, stats); ++ ++ list_for_each_entry_safe(bo_va, tmp, &vm->evicted, base.vm_status) ++ amdgpu_vm_bo_get_memory(bo_va, stats); ++ ++ list_for_each_entry_safe(bo_va, tmp, &vm->relocated, base.vm_status) ++ amdgpu_vm_bo_get_memory(bo_va, stats); ++ ++ list_for_each_entry_safe(bo_va, tmp, &vm->moved, base.vm_status) ++ amdgpu_vm_bo_get_memory(bo_va, stats); ++ ++ list_for_each_entry_safe(bo_va, tmp, &vm->invalidated, base.vm_status) ++ amdgpu_vm_bo_get_memory(bo_va, stats); ++ ++ list_for_each_entry_safe(bo_va, tmp, &vm->done, base.vm_status) ++ amdgpu_vm_bo_get_memory(bo_va, stats); + spin_unlock(&vm->status_lock); + } + diff --git a/queue-6.4/drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch b/queue-6.4/drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch new file mode 100644 index 00000000000..87759c2cd95 --- /dev/null +++ b/queue-6.4/drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch @@ -0,0 +1,42 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:17 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:27 -0400 +Subject: drm/amdgpu: make sure that BOs have a backing store +To: +Cc: mario.limonciello@amd.com, "Christian König" , "Alex Deucher" , "Guchun Chen" , "Mikhail Gavrilov" +Message-ID: <20230707150734.746135-2-alexander.deucher@amd.com> + +From: Christian König + +commit ca0b954a4315ca2228001c439ae1062561c81989 upstream + +It's perfectly possible that the BO is about to be destroyed and doesn't +have a backing store associated with it. + +Signed-off-by: Christian König +Reviewed-by: Alex Deucher +Acked-by: Guchun Chen +Tested-by: Mikhail Gavrilov +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org # 6.3.x +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +@@ -1266,8 +1266,12 @@ void amdgpu_bo_move_notify(struct ttm_bu + void amdgpu_bo_get_memory(struct amdgpu_bo *bo, + struct amdgpu_mem_stats *stats) + { +- unsigned int domain; + uint64_t size = amdgpu_bo_size(bo); ++ unsigned int domain; ++ ++ /* Abort if the BO doesn't currently have a backing store */ ++ if (!bo->tbo.resource) ++ return; + + domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type); + switch (domain) { diff --git a/queue-6.4/drm-amdgpu-sdma4-set-align-mask-to-255.patch b/queue-6.4/drm-amdgpu-sdma4-set-align-mask-to-255.patch new file mode 100644 index 00000000000..0c8e6d69389 --- /dev/null +++ b/queue-6.4/drm-amdgpu-sdma4-set-align-mask-to-255.patch @@ -0,0 +1,67 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:18 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:30 -0400 +Subject: drm/amdgpu/sdma4: set align mask to 255 +To: +Cc: mario.limonciello@amd.com, "Alex Deucher" , "Felix Kuehling" , "Aaron Liu" , "Christian König" +Message-ID: <20230707150734.746135-5-alexander.deucher@amd.com> + +From: Alex Deucher + +commit e5df16d9428f5c6d2d0b1eff244d6c330ba9ef3a upstream + +The wptr needs to be incremented at at least 64 dword intervals, +use 256 to align with windows. This should fix potential hangs +with unaligned updates. + +Reviewed-by: Felix Kuehling +Reviewed-by: Aaron Liu +Reviewed-by: Christian König +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -2306,7 +2306,7 @@ const struct amd_ip_funcs sdma_v4_0_ip_f + + static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs = { + .type = AMDGPU_RING_TYPE_SDMA, +- .align_mask = 0xf, ++ .align_mask = 0xff, + .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP), + .support_64bit_ptrs = true, + .secure_submission_supported = true, +@@ -2338,7 +2338,7 @@ static const struct amdgpu_ring_funcs sd + + static const struct amdgpu_ring_funcs sdma_v4_0_page_ring_funcs = { + .type = AMDGPU_RING_TYPE_SDMA, +- .align_mask = 0xf, ++ .align_mask = 0xff, + .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP), + .support_64bit_ptrs = true, + .secure_submission_supported = true, +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +@@ -1740,7 +1740,7 @@ const struct amd_ip_funcs sdma_v4_4_2_ip + + static const struct amdgpu_ring_funcs sdma_v4_4_2_ring_funcs = { + .type = AMDGPU_RING_TYPE_SDMA, +- .align_mask = 0xf, ++ .align_mask = 0xff, + .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP), + .support_64bit_ptrs = true, + .get_rptr = sdma_v4_4_2_ring_get_rptr, +@@ -1771,7 +1771,7 @@ static const struct amdgpu_ring_funcs sd + + static const struct amdgpu_ring_funcs sdma_v4_4_2_page_ring_funcs = { + .type = AMDGPU_RING_TYPE_SDMA, +- .align_mask = 0xf, ++ .align_mask = 0xff, + .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP), + .support_64bit_ptrs = true, + .get_rptr = sdma_v4_4_2_ring_get_rptr, diff --git a/queue-6.4/drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch b/queue-6.4/drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch new file mode 100644 index 00000000000..aeea5852a0c --- /dev/null +++ b/queue-6.4/drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch @@ -0,0 +1,37 @@ +From stable-owner@vger.kernel.org Fri Jul 7 17:08:14 2023 +From: Alex Deucher +Date: Fri, 7 Jul 2023 11:07:28 -0400 +Subject: drm/amdgpu: Skip mark offset for high priority rings +To: +Cc: , Jiadong Zhu , "Alex Deucher" +Message-ID: <20230707150734.746135-3-alexander.deucher@amd.com> + +From: Jiadong Zhu + +commit ef3c36a6e025e9b16ca3321479ba016841fa17a0 upstream + +Only low priority rings are using chunks to save the offset. +Bypass the mark offset callings from high priority rings. + +Signed-off-by: Jiadong Zhu +Acked-by: Alex Deucher +Signed-off-by: Alex Deucher +(cherry picked from commit ef3c36a6e025e9b16ca3321479ba016841fa17a0) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.c +@@ -423,6 +423,9 @@ void amdgpu_sw_ring_ib_mark_offset(struc + struct amdgpu_ring_mux *mux = &adev->gfx.muxer; + unsigned offset; + ++ if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) ++ return; ++ + offset = ring->wptr & ring->buf_mask; + + amdgpu_ring_mux_ib_mark_offset(mux, ring, offset, type); diff --git a/queue-6.4/series b/queue-6.4/series index e2e46d31bcd..ba33c61cc9c 100644 --- a/queue-6.4/series +++ b/queue-6.4/series @@ -785,3 +785,10 @@ ovl-fix-null-pointer-dereference-in-ovl_permission.patch ovl-let-helper-ovl_i_path_real-return-the-realinode.patch ovl-fix-null-pointer-dereference-in-ovl_get_acl_rcu.patch loongarch-include-kbuild_cppflags-in-checkflags-invocation.patch +drm-amdgpu-make-sure-bos-are-locked-in-amdgpu_vm_get_memory.patch +drm-amdgpu-make-sure-that-bos-have-a-backing-store.patch +drm-amdgpu-skip-mark-offset-for-high-priority-rings.patch +drm-amd-pm-revise-the-aspm-settings-for-thunderbolt-attached-scenario.patch +drm-amdgpu-sdma4-set-align-mask-to-255.patch +drm-amd-pm-add-abnormal-fan-detection-for-smu-13.0.0.patch +drm-amdgpu-check-ras-irq-existence-for-vcn-jpeg.patch -- 2.47.3