From 10e9eda24b1bbdaabdfdce0df27fe3c84686a254 Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Tue, 25 Nov 2014 12:17:53 +0000 Subject: [PATCH] arm64: implement "BRK #imm16". git-svn-id: svn://svn.valgrind.org/vex/trunk@3023 --- VEX/priv/guest_arm64_toIR.c | 15 +++++++++++++++ VEX/priv/host_arm64_defs.c | 2 +- VEX/priv/host_arm64_isel.c | 1 + 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c index 1a6e320a77..891b1274c4 100644 --- a/VEX/priv/guest_arm64_toIR.c +++ b/VEX/priv/guest_arm64_toIR.c @@ -6784,6 +6784,21 @@ Bool dis_ARM64_branch_etc(/*MB_OUT*/DisResult* dres, UInt insn, return True; } + /* -------------------- BRK -------------------- */ + /* 31 23 20 4 + 1101 0100 001 imm16 00000 BRK #imm16 + */ + if (INSN(31,24) == BITS8(1,1,0,1,0,1,0,0) + && INSN(23,21) == BITS3(0,0,1) && INSN(4,0) == BITS5(0,0,0,0,0)) { + UInt imm16 = INSN(20,5); + /* Request SIGTRAP and then restart of this insn. */ + putPC(mkU64(guest_PC_curr_instr + 0)); + dres->whatNext = Dis_StopHere; + dres->jk_StopHere = Ijk_SigTRAP; + DIP("brk #%u\n", imm16); + return True; + } + //fail: vex_printf("ARM64 front end: branch_etc\n"); return False; diff --git a/VEX/priv/host_arm64_defs.c b/VEX/priv/host_arm64_defs.c index 9f78f97689..c659ce0a80 100644 --- a/VEX/priv/host_arm64_defs.c +++ b/VEX/priv/host_arm64_defs.c @@ -3529,7 +3529,7 @@ Int emit_ARM64Instr ( /*MB_MOD*/Bool* is_profInc, case Ijk_InvalICache: trcval = VEX_TRC_JMP_INVALICACHE; break; case Ijk_FlushDCache: trcval = VEX_TRC_JMP_FLUSHDCACHE; break; case Ijk_NoRedir: trcval = VEX_TRC_JMP_NOREDIR; break; - //case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break; + case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break; //case Ijk_SigSEGV: trcval = VEX_TRC_JMP_SIGSEGV; break; case Ijk_Boring: trcval = VEX_TRC_JMP_BORING; break; /* We don't expect to see the following being assisted. */ diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c index 444b46a81a..5759994138 100644 --- a/VEX/priv/host_arm64_isel.c +++ b/VEX/priv/host_arm64_isel.c @@ -3838,6 +3838,7 @@ static void iselNext ( ISelEnv* env, case Ijk_Sys_syscall: case Ijk_InvalICache: case Ijk_FlushDCache: + case Ijk_SigTRAP: { HReg r = iselIntExpr_R(env, next); ARM64AMode* amPC = mk_baseblock_64bit_access_amode(offsIP); -- 2.47.2