From 1359282bd4ff16752c977d2f1a01a315c8df9f6b Mon Sep 17 00:00:00 2001 From: Likun Gao Date: Tue, 11 Nov 2025 11:43:05 +0800 Subject: [PATCH] drm/amdgpu/gmc12: set MMHUBs based on aid_mask Update number of mmhub and mid_mask via reuse aid_mask. Signed-off-by: Likun Gao Reviewed-by: Le Ma Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c index bb3d7fc40122b..efc519112ac45 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c @@ -771,6 +771,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block) { int r, vram_width = 0, vram_type = 0, vram_vendor = 0; struct amdgpu_device *adev = ip_block->adev; + int i; adev->mmhub.funcs->init(adev); @@ -800,7 +801,8 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block) case IP_VERSION(12, 1, 0): bitmap_set(adev->vmhubs_mask, AMDGPU_GFXHUB(0), NUM_XCC(adev->gfx.xcc_mask)); - set_bit(AMDGPU_MMHUB0(0), adev->vmhubs_mask); + for (i = 0; i < hweight32(adev->aid_mask); i++) + set_bit(AMDGPU_MMHUB0(i), adev->vmhubs_mask); /* * To fulfill 4-level page support, * vm size is 256TB (48bit), maximum size, -- 2.47.3