From 1aa4ee5338cbca1c5118d5a09b523d3818dddc2f Mon Sep 17 00:00:00 2001 From: Khairul Anuar Romli Date: Fri, 7 Nov 2025 07:35:26 +0800 Subject: [PATCH] arm64: dts: socfpga: Add Agilex5 SVC node with memory region Introduce the Stratix10 SoC Service Layer (SVC) node for Agilex5 SoCs. This node includes the compatible string "intel,agilex5-svc" and references a reserved memory region used for communication with the Secure Device Manager (SDM). Agilex5 introduces changes in how reserved memory is mapped and accessed compared to previous SoC generations. This commit updates the device tree structure to support Agilex5-specific handling of the SVC interface. Signed-off-by: Khairul Anuar Romli Signed-off-by: Dinh Nguyen --- arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 408911ea7bc59..bf7128adddde8 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -79,6 +79,15 @@ }; + firmware { + svc { + compatible = "intel,agilex5-svc"; + method = "smc"; + memory-region = <&service_reserved>; + iommus = <&smmu 10>; + }; + }; + psci { compatible = "arm,psci-0.2"; method = "smc"; -- 2.47.3