From 1d09cf18cc91d29f650ad9811ed4868d9304d6c7 Mon Sep 17 00:00:00 2001 From: Antoni Pokusinski Date: Thu, 2 Oct 2025 22:02:06 +0200 Subject: [PATCH] iio: mpl3115: add support for sampling frequency MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit When the device is in ACTIVE mode the temperature and pressure measurements are collected with a frequency determined by the ST[3:0] bits of CTRL_REG2 register. Reviewed-by: Nuno Sá Signed-off-by: Antoni Pokusinski Signed-off-by: Jonathan Cameron --- drivers/iio/pressure/mpl3115.c | 82 ++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c index e1b2c9f2bb43d..c212dfdf59ffa 100644 --- a/drivers/iio/pressure/mpl3115.c +++ b/drivers/iio/pressure/mpl3115.c @@ -10,6 +10,7 @@ * user offset correction, raw mode */ +#include #include #include #include @@ -30,6 +31,7 @@ #define MPL3115_INT_SOURCE 0x12 #define MPL3115_PT_DATA_CFG 0x13 #define MPL3115_CTRL_REG1 0x26 +#define MPL3115_CTRL_REG2 0x27 #define MPL3115_CTRL_REG3 0x28 #define MPL3115_CTRL_REG4 0x29 #define MPL3115_CTRL_REG5 0x2a @@ -48,6 +50,8 @@ #define MPL3115_CTRL1_ACTIVE BIT(0) /* continuous measurement */ #define MPL3115_CTRL1_OS_258MS GENMASK(5, 4) /* 64x oversampling */ +#define MPL3115_CTRL2_ST GENMASK(3, 0) + #define MPL3115_CTRL3_IPOL1 BIT(5) #define MPL3115_CTRL3_IPOL2 BIT(1) @@ -55,6 +59,25 @@ #define MPL3115_CTRL5_INT_CFG_DRDY BIT(7) +static const unsigned int mpl3115_samp_freq_table[][2] = { + { 1, 0 }, + { 0, 500000 }, + { 0, 250000 }, + { 0, 125000 }, + { 0, 62500 }, + { 0, 31250 }, + { 0, 15625 }, + { 0, 7812 }, + { 0, 3906 }, + { 0, 1953 }, + { 0, 976 }, + { 0, 488 }, + { 0, 244 }, + { 0, 122 }, + { 0, 61 }, + { 0, 30 }, +}; + struct mpl3115_data { struct i2c_client *client; struct iio_trigger *drdy_trig; @@ -170,10 +193,61 @@ static int mpl3115_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_SAMP_FREQ: + ret = i2c_smbus_read_byte_data(data->client, MPL3115_CTRL_REG2); + if (ret < 0) + return ret; + + ret = FIELD_GET(MPL3115_CTRL2_ST, ret); + + *val = mpl3115_samp_freq_table[ret][0]; + *val2 = mpl3115_samp_freq_table[ret][1]; + return IIO_VAL_INT_PLUS_MICRO; } return -EINVAL; } +static int mpl3115_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + if (mask != IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + *type = IIO_VAL_INT_PLUS_MICRO; + *length = ARRAY_SIZE(mpl3115_samp_freq_table) * 2; + *vals = (int *)mpl3115_samp_freq_table; + return IIO_AVAIL_LIST; +} + +static int mpl3115_write_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + int val, int val2, long mask) +{ + struct mpl3115_data *data = iio_priv(indio_dev); + int i, ret; + + if (mask != IIO_CHAN_INFO_SAMP_FREQ) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(mpl3115_samp_freq_table); i++) + if (val == mpl3115_samp_freq_table[i][0] && + val2 == mpl3115_samp_freq_table[i][1]) + break; + + if (i == ARRAY_SIZE(mpl3115_samp_freq_table)) + return -EINVAL; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret = i2c_smbus_write_byte_data(data->client, MPL3115_CTRL_REG2, + FIELD_PREP(MPL3115_CTRL2_ST, i)); + iio_device_release_direct(indio_dev); + return ret; +} + static int mpl3115_fill_trig_buffer(struct iio_dev *indio_dev, u8 *buffer) { struct mpl3115_data *data = iio_priv(indio_dev); @@ -237,6 +311,9 @@ static const struct iio_chan_spec mpl3115_channels[] = { .type = IIO_PRESSURE, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_shared_by_all_available = + BIT(IIO_CHAN_INFO_SAMP_FREQ), .scan_index = 0, .scan_type = { .sign = 'u', @@ -250,6 +327,9 @@ static const struct iio_chan_spec mpl3115_channels[] = { .type = IIO_TEMP, .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), + .info_mask_shared_by_all_available = + BIT(IIO_CHAN_INFO_SAMP_FREQ), .scan_index = 1, .scan_type = { .sign = 's', @@ -328,6 +408,8 @@ static const struct iio_trigger_ops mpl3115_trigger_ops = { static const struct iio_info mpl3115_info = { .read_raw = &mpl3115_read_raw, + .read_avail = &mpl3115_read_avail, + .write_raw = &mpl3115_write_raw, }; static int mpl3115_trigger_probe(struct mpl3115_data *data, -- 2.47.3