From 1f34cf9bcec78dba0782564012365af6a8d5d0ca Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Wed, 15 Feb 2023 16:24:29 +0100 Subject: [PATCH] i386: Rename extr_register_operand to int248_register_operand MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit No functional changes. gcc/ChangeLog: 2023-02-15 Uroš Bizjak * config/i386/predicates.md (int248_register_operand): Rename from extr_register_operand. * config/i386/i386.md (*extv): Update for renamed predicate. (*extzx): Ditto. (*ashl3_doubleword_mask): Use int248_register_operand predicate. (*ashl3_mask): Ditto. (*3_mask): Ditto. (*3_doubleword_mask): Ditto. (*3_mask): Ditto. (*_mask): Ditto. (*btr_mask): Ditto. (*jcc_bt_mask_1): Ditto. --- gcc/config/i386/i386.md | 51 +++++++++-------------------------- gcc/config/i386/predicates.md | 4 +-- 2 files changed, 14 insertions(+), 41 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5a946beb1c6a..e37bc8dca538 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3159,7 +3159,7 @@ (define_insn "*extv" [(set (match_operand:SWI24 0 "register_operand" "=R") - (sign_extract:SWI24 (match_operand 1 "extr_register_operand" "Q") + (sign_extract:SWI24 (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)))] "" @@ -3202,7 +3202,7 @@ (define_insn "*extzv" [(set (match_operand:SWI248 0 "register_operand" "=R") - (zero_extract:SWI248 (match_operand 1 "extr_register_operand" "Q") + (zero_extract:SWI248 (match_operand 1 "int248_register_operand" "Q") (const_int 8) (const_int 8)))] "" @@ -12449,15 +12449,12 @@ (match_operand: 1 "register_operand") (subreg:QI (and - (match_operand 2 "register_operand" "c") + (match_operand 2 "int248_register_operand" "c") (match_operand 3 "const_int_operand")) 0))) (clobber (reg:CC FLAGS_REG))] "((INTVAL (operands[3]) & ( * BITS_PER_UNIT)) == 0 || ((INTVAL (operands[3]) & (2 * * BITS_PER_UNIT - 1)) == (2 * * BITS_PER_UNIT - 1))) - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -12844,15 +12841,12 @@ (match_operand:SWI48 1 "nonimmediate_operand") (subreg:QI (and - (match_operand 2 "register_operand" "c,r") + (match_operand 2 "int248_register_operand" "c,r") (match_operand 3 "const_int_operand")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (ASHIFT, mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -13438,15 +13432,12 @@ (match_operand:SWI48 1 "nonimmediate_operand") (subreg:QI (and - (match_operand 2 "register_operand" "c,r") + (match_operand 2 "int248_register_operand" "c,r") (match_operand 3 "const_int_operand")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (, mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -13489,15 +13480,12 @@ (match_operand: 1 "register_operand") (subreg:QI (and - (match_operand 2 "register_operand" "c") + (match_operand 2 "int248_register_operand" "c") (match_operand 3 "const_int_operand")) 0))) (clobber (reg:CC FLAGS_REG))] "((INTVAL (operands[3]) & ( * BITS_PER_UNIT)) == 0 || ((INTVAL (operands[3]) & (2 * * BITS_PER_UNIT - 1)) == (2 * * BITS_PER_UNIT - 1))) - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -14384,15 +14372,12 @@ (match_operand:SWI 1 "nonimmediate_operand") (subreg:QI (and - (match_operand 2 "register_operand" "c") + (match_operand 2 "int248_register_operand" "c") (match_operand 3 "const_int_operand")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (, mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -14412,13 +14397,10 @@ (match_operand:SWI 1 "const_int_operand") (subreg:QI (and - (match_operand 2 "register_operand") + (match_operand 2 "int248_register_operand") (match_operand 3 "const_int_operand")) 0)))] "(INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode) - 1)) - == GET_MODE_BITSIZE (mode) - 1 - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0))" + == GET_MODE_BITSIZE (mode) - 1" [(set (match_dup 4) (match_dup 1)) (set (match_dup 0) (any_rotate:SWI (match_dup 4) @@ -14819,16 +14801,13 @@ (const_int 1) (subreg:QI (and - (match_operand 1 "register_operand") + (match_operand 1 "int248_register_operand") (match_operand 2 "const_int_operand")) 0)) (match_operand:SWI48 3 "register_operand"))) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 - && GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[1])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -14890,16 +14869,13 @@ (const_int -2) (subreg:QI (and - (match_operand 1 "register_operand") + (match_operand 1 "int248_register_operand") (match_operand 2 "const_int_operand")) 0)) (match_operand:SWI48 3 "register_operand"))) (clobber (reg:CC FLAGS_REG))] "TARGET_USE_BT && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 - && GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[1])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" @@ -15273,7 +15249,7 @@ (zero_extend:SI (subreg:QI (and - (match_operand 2 "register_operand") + (match_operand 2 "int248_register_operand") (match_operand 3 "const_int_operand")) 0)))]) (label_ref (match_operand 4)) (pc))) @@ -15281,9 +15257,6 @@ "(TARGET_USE_BT || optimize_function_for_size_p (cfun)) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (mode)-1)) == GET_MODE_BITSIZE (mode)-1 - && GET_MODE_CLASS (GET_MODE (operands[2])) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (GET_MODE (operands[2])), 2, - 4 << (TARGET_64BIT ? 1 : 0)) && ix86_pre_reload_split ()" "#" "&& 1" diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index cca64f00a6aa..2f079a6fad8a 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -92,8 +92,8 @@ (and (match_code "reg") (match_test "MASK_REGNO_P (REGNO (op))"))) -;; Match a DI, SI or HImode register operand for extract op. -(define_special_predicate "extr_register_operand" +;; Match a DI, SI or HImode register operand. +(define_special_predicate "int248_register_operand" (and (match_operand 0 "register_operand") (ior (and (match_test "TARGET_64BIT") (match_test "GET_MODE (op) == DImode")) -- 2.47.2