From 1fa844e8b886ecd9a597a2efe59f59d30750673c Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Mon, 19 Feb 2024 15:58:53 -0500 Subject: [PATCH] Fixes for 6.1 Signed-off-by: Sasha Levin --- ...alis-add-can-power-up-delay-on-ixora.patch | 43 +++++ ...m-msm8916-enable-blsp_dma-by-default.patch | 55 ++++++ ...sm8916-make-blsp_dma-controlled-remo.patch | 52 +++++ ...64-dts-qcom-sdm845-fix-usb-ss-wakeup.patch | 49 +++++ ...64-dts-qcom-sm8150-fix-usb-ss-wakeup.patch | 52 +++++ ...l-zone-append-completion-handling-in.patch | 58 ++++++ .../bus-moxtet-add-spi-device-table.patch | 52 +++++ ...ix-unexpected-pointer-access-in-mpi_.patch | 42 +++++ ...block-throttle-for-superblock-update.patch | 48 +++++ ..._tests-should-only-madv_hugepage-val.patch | 47 +++++ ...ate-va_high_addr_switch.sh-to-check-.patch | 69 +++++++ queue-6.1/series | 14 ++ ...x-add-extra-delay-for-firmware-ready.patch | 163 ++++++++++++++++ ...fiex-fix-uninitialized-firmware_stat.patch | 41 ++++ .../wifi-mwifiex-support-sd8978-chipset.patch | 178 ++++++++++++++++++ 15 files changed, 963 insertions(+) create mode 100644 queue-6.1/arm-dts-imx6q-apalis-add-can-power-up-delay-on-ixora.patch create mode 100644 queue-6.1/arm64-dts-qcom-msm8916-enable-blsp_dma-by-default.patch create mode 100644 queue-6.1/arm64-dts-qcom-msm8916-make-blsp_dma-controlled-remo.patch create mode 100644 queue-6.1/arm64-dts-qcom-sdm845-fix-usb-ss-wakeup.patch create mode 100644 queue-6.1/arm64-dts-qcom-sm8150-fix-usb-ss-wakeup.patch create mode 100644 queue-6.1/block-fix-partial-zone-append-completion-handling-in.patch create mode 100644 queue-6.1/bus-moxtet-add-spi-device-table.patch create mode 100644 queue-6.1/crypto-lib-mpi-fix-unexpected-pointer-access-in-mpi_.patch create mode 100644 queue-6.1/md-bypass-block-throttle-for-superblock-update.patch create mode 100644 queue-6.1/selftests-mm-ksm_tests-should-only-madv_hugepage-val.patch create mode 100644 queue-6.1/selftests-mm-update-va_high_addr_switch.sh-to-check-.patch create mode 100644 queue-6.1/wifi-mwifiex-add-extra-delay-for-firmware-ready.patch create mode 100644 queue-6.1/wifi-mwifiex-fix-uninitialized-firmware_stat.patch create mode 100644 queue-6.1/wifi-mwifiex-support-sd8978-chipset.patch diff --git a/queue-6.1/arm-dts-imx6q-apalis-add-can-power-up-delay-on-ixora.patch b/queue-6.1/arm-dts-imx6q-apalis-add-can-power-up-delay-on-ixora.patch new file mode 100644 index 00000000000..b793d8ac95a --- /dev/null +++ b/queue-6.1/arm-dts-imx6q-apalis-add-can-power-up-delay-on-ixora.patch @@ -0,0 +1,43 @@ +From 0bcbd78f0119c2b723bf742e1070f69f84ab3286 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 20 Oct 2023 17:30:22 +0200 +Subject: ARM: dts: imx6q-apalis: add can power-up delay on ixora board + +From: Andrejs Cainikovs + +[ Upstream commit b76bbf835d8945080b22b52fc1e6f41cde06865d ] + +Newer variants of Ixora boards require a power-up delay when powering up +the CAN transceiver of up to 1ms. + +Cc: stable@vger.kernel.org +Signed-off-by: Andrejs Cainikovs +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts +index f9f7d99bd4db..76f3e07bc882 100644 +--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts +@@ -76,6 +76,7 @@ reg_can1_supply: regulator-can1-supply { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can1_power>; + regulator-name = "can1_supply"; ++ startup-delay-us = <1000>; + }; + + reg_can2_supply: regulator-can2-supply { +@@ -85,6 +86,7 @@ reg_can2_supply: regulator-can2-supply { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can2_power>; + regulator-name = "can2_supply"; ++ startup-delay-us = <1000>; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.1/arm64-dts-qcom-msm8916-enable-blsp_dma-by-default.patch b/queue-6.1/arm64-dts-qcom-msm8916-enable-blsp_dma-by-default.patch new file mode 100644 index 00000000000..a8cb3bd3e1e --- /dev/null +++ b/queue-6.1/arm64-dts-qcom-msm8916-enable-blsp_dma-by-default.patch @@ -0,0 +1,55 @@ +From 7793e4a453f86952299143e13dc1279e627d7d48 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 7 Jan 2023 12:09:57 +0100 +Subject: arm64: dts: qcom: msm8916: Enable blsp_dma by default + +From: Stephan Gerhold + +[ Upstream commit 0154d3594af3c198532ac7b4ab70f50fb5207a15 ] + +Adding the "dmas" to the I2C controllers prevents probing them if +blsp_dma is disabled (infinite probe deferral). Avoid this by enabling +blsp_dma by default - it's an integral part of the SoC that is almost +always used (even if just for UART). + +Signed-off-by: Stephan Gerhold +Reviewed-by: Konrad Dybcio +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230107110958.5762-2-stephan@gerhold.net +Stable-dep-of: 7c45b6ddbcff ("arm64: dts: qcom: msm8916: Make blsp_dma controlled-remotely") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 4 ---- + arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 - + 2 files changed, 5 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +index 9d116e1fbe10..1ac4f8c24e23 100644 +--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts ++++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +@@ -169,10 +169,6 @@ led@6 { + }; + }; + +-&blsp_dma { +- status = "okay"; +-}; +- + &blsp_i2c2 { + /* On Low speed expansion */ + status = "okay"; +diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi +index bafac2cf7e3d..f0d097ade84c 100644 +--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi +@@ -1522,7 +1522,6 @@ blsp_dma: dma-controller@7884000 { + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; +- status = "disabled"; + }; + + blsp1_uart1: serial@78af000 { +-- +2.43.0 + diff --git a/queue-6.1/arm64-dts-qcom-msm8916-make-blsp_dma-controlled-remo.patch b/queue-6.1/arm64-dts-qcom-msm8916-make-blsp_dma-controlled-remo.patch new file mode 100644 index 00000000000..9e3517fb669 --- /dev/null +++ b/queue-6.1/arm64-dts-qcom-msm8916-make-blsp_dma-controlled-remo.patch @@ -0,0 +1,52 @@ +From 13f10d6f5288ae87534d3156fd4157b80c99b4b0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 4 Dec 2023 11:21:20 +0100 +Subject: arm64: dts: qcom: msm8916: Make blsp_dma controlled-remotely + +From: Stephan Gerhold + +[ Upstream commit 7c45b6ddbcff01f9934d11802010cfeb0879e693 ] + +The blsp_dma controller is shared between the different subsystems, +which is why it is already initialized by the firmware. We should not +reinitialize it from Linux to avoid potential other users of the DMA +engine to misbehave. + +In mainline this can be described using the "qcom,controlled-remotely" +property. In the downstream/vendor kernel from Qualcomm there is an +opposite "qcom,managed-locally" property. This property is *not* set +for the qcom,sps-dma@7884000 [1] so adding "qcom,controlled-remotely" +upstream matches the behavior of the downstream/vendor kernel. + +Adding this seems to fix some weird issues with UART where both +input/output becomes garbled with certain obscure firmware versions on +some devices. + +[1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/blob/LA.BR.1.2.9.1-02310-8x16.0/arch/arm/boot/dts/qcom/msm8916.dtsi#L1466-1472 + +Cc: stable@vger.kernel.org # 6.5 +Fixes: a0e5fb103150 ("arm64: dts: qcom: Add msm8916 BLSP device nodes") +Signed-off-by: Stephan Gerhold +Reviewed-by: Bryan O'Donoghue +Link: https://lore.kernel.org/r/20231204-msm8916-blsp-dma-remote-v1-1-3e49c8838c8d@gerhold.net +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi +index f0d097ade84c..987cebbda057 100644 +--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi +@@ -1522,6 +1522,7 @@ blsp_dma: dma-controller@7884000 { + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; ++ qcom,controlled-remotely; + }; + + blsp1_uart1: serial@78af000 { +-- +2.43.0 + diff --git a/queue-6.1/arm64-dts-qcom-sdm845-fix-usb-ss-wakeup.patch b/queue-6.1/arm64-dts-qcom-sdm845-fix-usb-ss-wakeup.patch new file mode 100644 index 00000000000..22f3ffd5a46 --- /dev/null +++ b/queue-6.1/arm64-dts-qcom-sdm845-fix-usb-ss-wakeup.patch @@ -0,0 +1,49 @@ +From ba13d9f53bf87dd3505858aedba579625403f338 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Dec 2023 18:34:01 +0100 +Subject: arm64: dts: qcom: sdm845: fix USB SS wakeup + +From: Johan Hovold + +[ Upstream commit 971f5d8b0618d09db75184ddd8cca0767514db5d ] + +The USB SS PHY interrupts need to be provided by the PDC interrupt +controller in order to be able to wake the system up from low-power +states. + +Fixes: ca4db2b538a1 ("arm64: dts: qcom: sdm845: Add USB-related nodes") +Cc: stable@vger.kernel.org # 4.20 +Signed-off-by: Johan Hovold +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20231213173403.29544-4-johan+linaro@kernel.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi +index 4d5905ef0b41..95c515da9f2e 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi +@@ -4049,7 +4049,7 @@ usb_1: usb@a6f8800 { + assigned-clock-rates = <19200000>, <150000000>; + + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, +- <&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, ++ <&pdc_intc 6 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 9 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", +@@ -4100,7 +4100,7 @@ usb_2: usb@a8f8800 { + assigned-clock-rates = <19200000>, <150000000>; + + interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, +- <&intc GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, ++ <&pdc_intc 7 IRQ_TYPE_LEVEL_HIGH>, + <&pdc_intc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc_intc 11 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", +-- +2.43.0 + diff --git a/queue-6.1/arm64-dts-qcom-sm8150-fix-usb-ss-wakeup.patch b/queue-6.1/arm64-dts-qcom-sm8150-fix-usb-ss-wakeup.patch new file mode 100644 index 00000000000..8898a2b81b2 --- /dev/null +++ b/queue-6.1/arm64-dts-qcom-sm8150-fix-usb-ss-wakeup.patch @@ -0,0 +1,52 @@ +From 0c8eb3492dd956e4a60d577f6af67ff2cdf683c7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 13 Dec 2023 18:34:03 +0100 +Subject: arm64: dts: qcom: sm8150: fix USB SS wakeup + +From: Johan Hovold + +[ Upstream commit cc4e1da491b84ca05339a19893884cda78f74aef ] + +The USB SS PHY interrupts need to be provided by the PDC interrupt +controller in order to be able to wake the system up from low-power +states. + +Fixes: 0c9dde0d2015 ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes") +Fixes: b33d2868e8d3 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes") +Cc: stable@vger.kernel.org # 5.10 +Cc: Jack Pham +Cc: Jonathan Marek +Signed-off-by: Johan Hovold +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20231213173403.29544-6-johan+linaro@kernel.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi +index 8efd0e227d78..eb1a9369926d 100644 +--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi +@@ -3629,7 +3629,7 @@ usb_1: usb@a6f8800 { + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, +- <&intc GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, ++ <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_BOTH>, + <&pdc 9 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", +@@ -3678,7 +3678,7 @@ usb_2: usb@a8f8800 { + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, +- <&intc GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>, ++ <&pdc 7 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "hs_phy_irq", "ss_phy_irq", +-- +2.43.0 + diff --git a/queue-6.1/block-fix-partial-zone-append-completion-handling-in.patch b/queue-6.1/block-fix-partial-zone-append-completion-handling-in.patch new file mode 100644 index 00000000000..83b5e31a7a7 --- /dev/null +++ b/queue-6.1/block-fix-partial-zone-append-completion-handling-in.patch @@ -0,0 +1,58 @@ +From 47fb8021b12dd28882142c16a943950572d5a2ec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jan 2024 18:29:42 +0900 +Subject: block: fix partial zone append completion handling in req_bio_endio() + +From: Damien Le Moal + +[ Upstream commit 748dc0b65ec2b4b7b3dbd7befcc4a54fdcac7988 ] + +Partial completions of zone append request is not allowed but if a zone +append completion indicates a number of completed bytes different from +the original BIO size, only the BIO status is set to error. This leads +to bio_advance() not setting the BIO size to 0 and thus to not call +bio_endio() at the end of req_bio_endio(). + +Make sure a partially completed zone append is failed and completed +immediately by forcing the completed number of bytes (nbytes) to be +equal to the BIO size, thus ensuring that bio_endio() is called. + +Fixes: 297db731847e ("block: fix req_bio_endio append error handling") +Cc: stable@kernel.vger.org +Signed-off-by: Damien Le Moal +Reviewed-by: Christoph Hellwig +Reviewed-by: Johannes Thumshirn +Reviewed-by: Hannes Reinecke +Link: https://lore.kernel.org/r/20240110092942.442334-1-dlemoal@kernel.org +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + block/blk-mq.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/block/blk-mq.c b/block/blk-mq.c +index c07e5eebcbd8..7ed6b9469f97 100644 +--- a/block/blk-mq.c ++++ b/block/blk-mq.c +@@ -747,11 +747,16 @@ static void req_bio_endio(struct request *rq, struct bio *bio, + /* + * Partial zone append completions cannot be supported as the + * BIO fragments may end up not being written sequentially. ++ * For such case, force the completed nbytes to be equal to ++ * the BIO size so that bio_advance() sets the BIO remaining ++ * size to 0 and we end up calling bio_endio() before returning. + */ +- if (bio->bi_iter.bi_size != nbytes) ++ if (bio->bi_iter.bi_size != nbytes) { + bio->bi_status = BLK_STS_IOERR; +- else ++ nbytes = bio->bi_iter.bi_size; ++ } else { + bio->bi_iter.bi_sector = rq->__sector; ++ } + } + + bio_advance(bio, nbytes); +-- +2.43.0 + diff --git a/queue-6.1/bus-moxtet-add-spi-device-table.patch b/queue-6.1/bus-moxtet-add-spi-device-table.patch new file mode 100644 index 00000000000..24f5da3a065 --- /dev/null +++ b/queue-6.1/bus-moxtet-add-spi-device-table.patch @@ -0,0 +1,52 @@ +From d967f9a48420155db330ed9fe1ae1ca5eac38bc8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 Nov 2023 22:35:05 +0100 +Subject: bus: moxtet: Add spi device table +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Sjoerd Simons + +[ Upstream commit aaafe88d5500ba18b33be72458439367ef878788 ] + +The moxtet module fails to auto-load on. Add a SPI id table to +allow it to do so. + +Signed-off-by: Sjoerd Simons +Cc: +Reviewed-by: Marek Behún +Signed-off-by: Gregory CLEMENT +Signed-off-by: Sasha Levin +--- + drivers/bus/moxtet.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/drivers/bus/moxtet.c b/drivers/bus/moxtet.c +index 5eb0fe73ddc4..79fc96c8d836 100644 +--- a/drivers/bus/moxtet.c ++++ b/drivers/bus/moxtet.c +@@ -830,6 +830,12 @@ static void moxtet_remove(struct spi_device *spi) + mutex_destroy(&moxtet->lock); + } + ++static const struct spi_device_id moxtet_spi_ids[] = { ++ { "moxtet" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(spi, moxtet_spi_ids); ++ + static const struct of_device_id moxtet_dt_ids[] = { + { .compatible = "cznic,moxtet" }, + {}, +@@ -841,6 +847,7 @@ static struct spi_driver moxtet_spi_driver = { + .name = "moxtet", + .of_match_table = moxtet_dt_ids, + }, ++ .id_table = moxtet_spi_ids, + .probe = moxtet_probe, + .remove = moxtet_remove, + }; +-- +2.43.0 + diff --git a/queue-6.1/crypto-lib-mpi-fix-unexpected-pointer-access-in-mpi_.patch b/queue-6.1/crypto-lib-mpi-fix-unexpected-pointer-access-in-mpi_.patch new file mode 100644 index 00000000000..3c95a9f49be --- /dev/null +++ b/queue-6.1/crypto-lib-mpi-fix-unexpected-pointer-access-in-mpi_.patch @@ -0,0 +1,42 @@ +From 4145f435e31b5221cccd089702ca2df7fe1300aa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 14 Dec 2023 11:08:34 +0800 +Subject: crypto: lib/mpi - Fix unexpected pointer access in mpi_ec_init + +From: Tianjia Zhang + +[ Upstream commit ba3c5574203034781ac4231acf117da917efcd2a ] + +When the mpi_ec_ctx structure is initialized, some fields are not +cleared, causing a crash when referencing the field when the +structure was released. Initially, this issue was ignored because +memory for mpi_ec_ctx is allocated with the __GFP_ZERO flag. +For example, this error will be triggered when calculating the +Za value for SM2 separately. + +Fixes: d58bb7e55a8a ("lib/mpi: Introduce ec implementation to MPI library") +Cc: stable@vger.kernel.org # v6.5 +Signed-off-by: Tianjia Zhang +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + lib/mpi/ec.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/lib/mpi/ec.c b/lib/mpi/ec.c +index 40f5908e57a4..e16dca1e23d5 100644 +--- a/lib/mpi/ec.c ++++ b/lib/mpi/ec.c +@@ -584,6 +584,9 @@ void mpi_ec_init(struct mpi_ec_ctx *ctx, enum gcry_mpi_ec_models model, + ctx->a = mpi_copy(a); + ctx->b = mpi_copy(b); + ++ ctx->d = NULL; ++ ctx->t.two_inv_p = NULL; ++ + ctx->t.p_barrett = use_barrett > 0 ? mpi_barrett_init(ctx->p, 0) : NULL; + + mpi_ec_get_reset(ctx); +-- +2.43.0 + diff --git a/queue-6.1/md-bypass-block-throttle-for-superblock-update.patch b/queue-6.1/md-bypass-block-throttle-for-superblock-update.patch new file mode 100644 index 00000000000..f92fc16e668 --- /dev/null +++ b/queue-6.1/md-bypass-block-throttle-for-superblock-update.patch @@ -0,0 +1,48 @@ +From 657e60e87bc59c5ab52576536f721caac200ad60 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 8 Nov 2023 10:22:15 -0800 +Subject: md: bypass block throttle for superblock update + +From: Junxiao Bi + +[ Upstream commit d6e035aad6c09991da1c667fb83419329a3baed8 ] + +commit 5e2cf333b7bd ("md/raid5: Wait for MD_SB_CHANGE_PENDING in raid5d") +introduced a hung bug and will be reverted in next patch, since the issue +that commit is fixing is due to md superblock write is throttled by wbt, +to fix it, we can have superblock write bypass block layer throttle. + +Fixes: 5e2cf333b7bd ("md/raid5: Wait for MD_SB_CHANGE_PENDING in raid5d") +Cc: stable@vger.kernel.org # v5.19+ +Suggested-by: Yu Kuai +Signed-off-by: Junxiao Bi +Reviewed-by: Logan Gunthorpe +Reviewed-by: Yu Kuai +Signed-off-by: Song Liu +Link: https://lore.kernel.org/r/20231108182216.73611-1-junxiao.bi@oracle.com +Signed-off-by: Sasha Levin +--- + drivers/md/md.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/md/md.c b/drivers/md/md.c +index 3ccf1920682c..c7efe1522951 100644 +--- a/drivers/md/md.c ++++ b/drivers/md/md.c +@@ -963,9 +963,10 @@ void md_super_write(struct mddev *mddev, struct md_rdev *rdev, + return; + + bio = bio_alloc_bioset(rdev->meta_bdev ? rdev->meta_bdev : rdev->bdev, +- 1, +- REQ_OP_WRITE | REQ_SYNC | REQ_PREFLUSH | REQ_FUA, +- GFP_NOIO, &mddev->sync_set); ++ 1, ++ REQ_OP_WRITE | REQ_SYNC | REQ_IDLE | REQ_META ++ | REQ_PREFLUSH | REQ_FUA, ++ GFP_NOIO, &mddev->sync_set); + + atomic_inc(&rdev->nr_pending); + +-- +2.43.0 + diff --git a/queue-6.1/selftests-mm-ksm_tests-should-only-madv_hugepage-val.patch b/queue-6.1/selftests-mm-ksm_tests-should-only-madv_hugepage-val.patch new file mode 100644 index 00000000000..82f1e6a198f --- /dev/null +++ b/queue-6.1/selftests-mm-ksm_tests-should-only-madv_hugepage-val.patch @@ -0,0 +1,47 @@ +From 184f6031f1413b0ebee254c411193bdb8e49742a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Jan 2024 12:05:54 +0000 +Subject: selftests/mm: ksm_tests should only MADV_HUGEPAGE valid memory + +From: Ryan Roberts + +[ Upstream commit d021b442cf312664811783e92b3d5e4548e92a53 ] + +ksm_tests was previously mmapping a region of memory, aligning the +returned pointer to a PMD boundary, then setting MADV_HUGEPAGE, but was +setting it past the end of the mmapped area due to not taking the pointer +alignment into consideration. Fix this behaviour. + +Up until commit efa7df3e3bb5 ("mm: align larger anonymous mappings on THP +boundaries"), this buggy behavior was (usually) masked because the +alignment difference was always less than PMD-size. But since the +mentioned commit, `ksm_tests -H -s 100` started failing. + +Link: https://lkml.kernel.org/r/20240122120554.3108022-1-ryan.roberts@arm.com +Fixes: 325254899684 ("selftests: vm: add KSM huge pages merging time test") +Signed-off-by: Ryan Roberts +Cc: Pedro Demarchi Gomes +Cc: Shuah Khan +Cc: +Signed-off-by: Andrew Morton +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/vm/ksm_tests.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/vm/ksm_tests.c b/tools/testing/selftests/vm/ksm_tests.c +index 0d85be2350fa..a81165930785 100644 +--- a/tools/testing/selftests/vm/ksm_tests.c ++++ b/tools/testing/selftests/vm/ksm_tests.c +@@ -470,7 +470,7 @@ static int ksm_merge_hugepages_time(int mapping, int prot, int timeout, size_t m + if (map_ptr_orig == MAP_FAILED) + err(2, "initial mmap"); + +- if (madvise(map_ptr, len + HPAGE_SIZE, MADV_HUGEPAGE)) ++ if (madvise(map_ptr, len, MADV_HUGEPAGE)) + err(2, "MADV_HUGEPAGE"); + + pagemap_fd = open("/proc/self/pagemap", O_RDONLY); +-- +2.43.0 + diff --git a/queue-6.1/selftests-mm-update-va_high_addr_switch.sh-to-check-.patch b/queue-6.1/selftests-mm-update-va_high_addr_switch.sh-to-check-.patch new file mode 100644 index 00000000000..d447a2f65a3 --- /dev/null +++ b/queue-6.1/selftests-mm-update-va_high_addr_switch.sh-to-check-.patch @@ -0,0 +1,69 @@ +From 6f9e7161151e82abb47ea919ca4a247fb2baf144 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 19 Jan 2024 15:58:01 -0500 +Subject: selftests/mm: Update va_high_addr_switch.sh to check CPU for la57 + flag + +From: Audra Mitchell + +[ Upstream commit 52e63d67b5bb423b33d7a262ac7f8bd375a90145 ] + +In order for the page table level 5 to be in use, the CPU must have the +setting enabled in addition to the CONFIG option. Check for the flag to be +set to avoid false test failures on systems that do not have this cpu flag +set. + +The test does a series of mmap calls including three using the +MAP_FIXED flag and specifying an address that is 1<<47 or 1<<48. These +addresses are only available if you are using level 5 page tables, +which requires both the CPU to have the capabiltiy (la57 flag) and the +kernel to be configured. Currently the test only checks for the kernel +configuration option, so this test can still report a false positive. +Here are the three failing lines: + +$ ./va_high_addr_switch | grep FAILED +mmap(ADDR_SWITCH_HINT, 2 * PAGE_SIZE, MAP_FIXED): 0xffffffffffffffff - FAILED +mmap(HIGH_ADDR, MAP_FIXED): 0xffffffffffffffff - FAILED +mmap(ADDR_SWITCH_HINT, 2 * PAGE_SIZE, MAP_FIXED): 0xffffffffffffffff - FAILED + +I thought (for about a second) refactoring the test so that these three +mmap calls will only be run on systems with the level 5 page tables +available, but the whole point of the test is to check the level 5 +feature... + +Link: https://lkml.kernel.org/r/20240119205801.62769-1-audra@redhat.com +Fixes: 4f2930c6718a ("selftests/vm: only run 128TBswitch with 5-level paging") +Signed-off-by: Audra Mitchell +Cc: Rafael Aquini +Cc: Shuah Khan +Cc: Adam Sindelar +Cc: +Signed-off-by: Andrew Morton +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/vm/va_128TBswitch.sh | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/tools/testing/selftests/vm/va_128TBswitch.sh b/tools/testing/selftests/vm/va_128TBswitch.sh +index 41580751dc51..231622b3a232 100755 +--- a/tools/testing/selftests/vm/va_128TBswitch.sh ++++ b/tools/testing/selftests/vm/va_128TBswitch.sh +@@ -29,9 +29,15 @@ check_supported_x86_64() + # See man 1 gzip under '-f'. + local pg_table_levels=$(gzip -dcfq "${config}" | grep PGTABLE_LEVELS | cut -d'=' -f 2) + ++ local cpu_supports_pl5=$(awk '/^flags/ {if (/la57/) {print 0;} ++ else {print 1}; exit}' /proc/cpuinfo 2>/dev/null) ++ + if [[ "${pg_table_levels}" -lt 5 ]]; then + echo "$0: PGTABLE_LEVELS=${pg_table_levels}, must be >= 5 to run this test" + exit $ksft_skip ++ elif [[ "${cpu_supports_pl5}" -ne 0 ]]; then ++ echo "$0: CPU does not have the necessary la57 flag to support page table level 5" ++ exit $ksft_skip + fi + } + +-- +2.43.0 + diff --git a/queue-6.1/series b/queue-6.1/series index af32a8142cb..2e615aed368 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -163,3 +163,17 @@ tracing-inform-kmemleak-of-saved_cmdlines-allocation.patch xfrm-use-xfrm_state-selector-for-beet-input.patch xfrm-silence-warnings-triggerable-by-bad-packets.patch tls-fix-null-deref-on-tls_sw_splice_eof-with-empty-record.patch +selftests-mm-ksm_tests-should-only-madv_hugepage-val.patch +selftests-mm-update-va_high_addr_switch.sh-to-check-.patch +md-bypass-block-throttle-for-superblock-update.patch +arm-dts-imx6q-apalis-add-can-power-up-delay-on-ixora.patch +wifi-mwifiex-support-sd8978-chipset.patch +wifi-mwifiex-add-extra-delay-for-firmware-ready.patch +bus-moxtet-add-spi-device-table.patch +arm64-dts-qcom-msm8916-enable-blsp_dma-by-default.patch +arm64-dts-qcom-msm8916-make-blsp_dma-controlled-remo.patch +arm64-dts-qcom-sdm845-fix-usb-ss-wakeup.patch +arm64-dts-qcom-sm8150-fix-usb-ss-wakeup.patch +wifi-mwifiex-fix-uninitialized-firmware_stat.patch +crypto-lib-mpi-fix-unexpected-pointer-access-in-mpi_.patch +block-fix-partial-zone-append-completion-handling-in.patch diff --git a/queue-6.1/wifi-mwifiex-add-extra-delay-for-firmware-ready.patch b/queue-6.1/wifi-mwifiex-add-extra-delay-for-firmware-ready.patch new file mode 100644 index 00000000000..a82688334b5 --- /dev/null +++ b/queue-6.1/wifi-mwifiex-add-extra-delay-for-firmware-ready.patch @@ -0,0 +1,163 @@ +From f0e8eda2f7f7e8da1a358ed78f95aa04e298a5d2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 9 Dec 2023 07:40:29 +0800 +Subject: wifi: mwifiex: add extra delay for firmware ready + +From: David Lin + +[ Upstream commit 1c5d463c0770c6fa2037511a24fb17966fd07d97 ] + +For SDIO IW416, due to a bug, FW may return ready before complete full +initialization. Command timeout may occur at driver load after reboot. +Workaround by adding 100ms delay at checking FW status. + +Signed-off-by: David Lin +Cc: stable@vger.kernel.org +Reviewed-by: Francesco Dolcini +Acked-by: Brian Norris +Tested-by: Marcel Ziswiler # Verdin AM62 (IW416) +Signed-off-by: Kalle Valo +Link: https://msgid.link/20231208234029.2197-1-yu-hao.lin@nxp.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/marvell/mwifiex/sdio.c | 19 +++++++++++++++++++ + drivers/net/wireless/marvell/mwifiex/sdio.h | 2 ++ + 2 files changed, 21 insertions(+) + +diff --git a/drivers/net/wireless/marvell/mwifiex/sdio.c b/drivers/net/wireless/marvell/mwifiex/sdio.c +index a24bd40dd41a..e55747b50dbf 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sdio.c ++++ b/drivers/net/wireless/marvell/mwifiex/sdio.c +@@ -331,6 +331,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = { + .can_dump_fw = false, + .can_auto_tdls = false, + .can_ext_scan = false, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = { +@@ -346,6 +347,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = { + .can_dump_fw = false, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = { +@@ -361,6 +363,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = { + .can_dump_fw = false, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = { +@@ -376,6 +379,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = { + .can_dump_fw = true, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = { +@@ -392,6 +396,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = { + .fw_dump_enh = true, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8978 = { +@@ -408,6 +413,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8978 = { + .fw_dump_enh = true, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = true, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = { +@@ -425,6 +431,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = { + .fw_dump_enh = true, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = { +@@ -440,6 +447,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = { + .can_dump_fw = false, + .can_auto_tdls = true, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = { +@@ -456,6 +464,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = { + .fw_dump_enh = true, + .can_auto_tdls = true, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = { +@@ -471,6 +480,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = { + .can_dump_fw = false, + .can_auto_tdls = false, + .can_ext_scan = true, ++ .fw_ready_extra_delay = false, + }; + + static struct memory_type_mapping generic_mem_type_map[] = { +@@ -563,6 +573,7 @@ mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id) + card->fw_dump_enh = data->fw_dump_enh; + card->can_auto_tdls = data->can_auto_tdls; + card->can_ext_scan = data->can_ext_scan; ++ card->fw_ready_extra_delay = data->fw_ready_extra_delay; + INIT_WORK(&card->work, mwifiex_sdio_work); + } + +@@ -766,6 +777,7 @@ mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat) + static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, + u32 poll_num) + { ++ struct sdio_mmc_card *card = adapter->card; + int ret = 0; + u16 firmware_stat; + u32 tries; +@@ -783,6 +795,13 @@ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, + ret = -1; + } + ++ if (card->fw_ready_extra_delay && ++ firmware_stat == FIRMWARE_READY_SDIO) ++ /* firmware might pretend to be ready, when it's not. ++ * Wait a little bit more as a workaround. ++ */ ++ msleep(100); ++ + return ret; + } + +diff --git a/drivers/net/wireless/marvell/mwifiex/sdio.h b/drivers/net/wireless/marvell/mwifiex/sdio.h +index ae94c172310f..a5112cb35cdc 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sdio.h ++++ b/drivers/net/wireless/marvell/mwifiex/sdio.h +@@ -258,6 +258,7 @@ struct sdio_mmc_card { + bool fw_dump_enh; + bool can_auto_tdls; + bool can_ext_scan; ++ bool fw_ready_extra_delay; + + struct mwifiex_sdio_mpa_tx mpa_tx; + struct mwifiex_sdio_mpa_rx mpa_rx; +@@ -281,6 +282,7 @@ struct mwifiex_sdio_device { + bool fw_dump_enh; + bool can_auto_tdls; + bool can_ext_scan; ++ bool fw_ready_extra_delay; + }; + + /* +-- +2.43.0 + diff --git a/queue-6.1/wifi-mwifiex-fix-uninitialized-firmware_stat.patch b/queue-6.1/wifi-mwifiex-fix-uninitialized-firmware_stat.patch new file mode 100644 index 00000000000..b7a72c3dd95 --- /dev/null +++ b/queue-6.1/wifi-mwifiex-fix-uninitialized-firmware_stat.patch @@ -0,0 +1,41 @@ +From ed5eaa30c1d95e0b4bf4e17d47c0c1b3ff5ee7c7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Dec 2023 09:55:11 +0800 +Subject: wifi: mwifiex: fix uninitialized firmware_stat + +From: David Lin + +[ Upstream commit 3df95e265924ac898c1a38a0c01846dd0bd3b354 ] + +Variable firmware_stat is possible to be used without initialization. + +Signed-off-by: David Lin +Fixes: 1c5d463c0770 ("wifi: mwifiex: add extra delay for firmware ready") +Cc: stable@vger.kernel.org +Reported-by: kernel test robot +Reported-by: Dan Carpenter +Closes: https://lore.kernel.org/r/202312192236.ZflaWYCw-lkp@intel.com/ +Acked-by: Brian Norris +Signed-off-by: Kalle Valo +Link: https://msgid.link/20231221015511.1032128-1-yu-hao.lin@nxp.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/marvell/mwifiex/sdio.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/marvell/mwifiex/sdio.c b/drivers/net/wireless/marvell/mwifiex/sdio.c +index e55747b50dbf..2c9b70e9a726 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sdio.c ++++ b/drivers/net/wireless/marvell/mwifiex/sdio.c +@@ -779,7 +779,7 @@ static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter, + { + struct sdio_mmc_card *card = adapter->card; + int ret = 0; +- u16 firmware_stat; ++ u16 firmware_stat = 0; + u32 tries; + + for (tries = 0; tries < poll_num; tries++) { +-- +2.43.0 + diff --git a/queue-6.1/wifi-mwifiex-support-sd8978-chipset.patch b/queue-6.1/wifi-mwifiex-support-sd8978-chipset.patch new file mode 100644 index 00000000000..8b05cc6f610 --- /dev/null +++ b/queue-6.1/wifi-mwifiex-support-sd8978-chipset.patch @@ -0,0 +1,178 @@ +From acc4816aa30c5a50ee1523287e127df40a7e3c0f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 27 Jan 2023 15:02:00 +0100 +Subject: wifi: mwifiex: Support SD8978 chipset + +From: Lukas Wunner + +[ Upstream commit bba047f15851c8b053221f1b276eb7682d59f755 ] + +The Marvell SD8978 (aka NXP IW416) uses identical registers as SD8987, +so reuse the existing mwifiex_reg_sd8987 definition. + +Note that mwifiex_reg_sd8977 and mwifiex_reg_sd8997 are likewise +identical, save for the fw_dump_ctrl register: They define it as 0xf0 +whereas mwifiex_reg_sd8987 defines it as 0xf9. I've verified that +0xf9 is the correct value on SD8978. NXP's out-of-tree driver uses +0xf9 for all of them, so there's a chance that 0xf0 is not correct +in the mwifiex_reg_sd8977 and mwifiex_reg_sd8997 definitions. I cannot +test that for lack of hardware, hence am leaving it as is. + +NXP has only released a firmware which runs Bluetooth over UART. +Perhaps Bluetooth over SDIO is unsupported by this chipset. +Consequently, only an "sdiouart" firmware image is referenced, not an +alternative "sdsd" image. + +Signed-off-by: Lukas Wunner +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/536b4f17a72ca460ad1b07045757043fb0778988.1674827105.git.lukas@wunner.de +Stable-dep-of: 1c5d463c0770 ("wifi: mwifiex: add extra delay for firmware ready") +Signed-off-by: Sasha Levin +--- + .../bindings/net/wireless/marvell-8xxx.txt | 4 ++- + drivers/net/wireless/marvell/mwifiex/Kconfig | 5 ++-- + drivers/net/wireless/marvell/mwifiex/sdio.c | 25 +++++++++++++++++-- + drivers/net/wireless/marvell/mwifiex/sdio.h | 1 + + include/linux/mmc/sdio_ids.h | 1 + + 5 files changed, 31 insertions(+), 5 deletions(-) + +diff --git a/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt b/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt +index 9bf9bbac16e2..cdc303caf5f4 100644 +--- a/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt ++++ b/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt +@@ -1,4 +1,4 @@ +-Marvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices ++Marvell 8787/8897/8978/8997 (sd8787/sd8897/sd8978/sd8997/pcie8997) SDIO/PCIE devices + ------ + + This node provides properties for controlling the Marvell SDIO/PCIE wireless device. +@@ -10,7 +10,9 @@ Required properties: + - compatible : should be one of the following: + * "marvell,sd8787" + * "marvell,sd8897" ++ * "marvell,sd8978" + * "marvell,sd8997" ++ * "nxp,iw416" + * "pci11ab,2b42" + * "pci1b4b,2b42" + +diff --git a/drivers/net/wireless/marvell/mwifiex/Kconfig b/drivers/net/wireless/marvell/mwifiex/Kconfig +index 2b4ff2b78a7e..b182f7155d66 100644 +--- a/drivers/net/wireless/marvell/mwifiex/Kconfig ++++ b/drivers/net/wireless/marvell/mwifiex/Kconfig +@@ -10,13 +10,14 @@ config MWIFIEX + mwifiex. + + config MWIFIEX_SDIO +- tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797/SD8887/SD8897/SD8977/SD8987/SD8997" ++ tristate "Marvell WiFi-Ex Driver for SD8786/SD8787/SD8797/SD8887/SD8897/SD8977/SD8978/SD8987/SD8997" + depends on MWIFIEX && MMC + select FW_LOADER + select WANT_DEV_COREDUMP + help + This adds support for wireless adapters based on Marvell +- 8786/8787/8797/8887/8897/8977/8987/8997 chipsets with SDIO interface. ++ 8786/8787/8797/8887/8897/8977/8978/8987/8997 chipsets with ++ SDIO interface. SD8978 is also known as NXP IW416. + + If you choose to build it as a module, it will be called + mwifiex_sdio. +diff --git a/drivers/net/wireless/marvell/mwifiex/sdio.c b/drivers/net/wireless/marvell/mwifiex/sdio.c +index ea1c1c2412e7..a24bd40dd41a 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sdio.c ++++ b/drivers/net/wireless/marvell/mwifiex/sdio.c +@@ -263,7 +263,7 @@ static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = { + 0x68, 0x69, 0x6a}, + }; + +-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8987 = { ++static const struct mwifiex_sdio_card_reg mwifiex_reg_sd89xx = { + .start_rd_port = 0, + .start_wr_port = 0, + .base_0_reg = 0xF8, +@@ -394,6 +394,22 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = { + .can_ext_scan = true, + }; + ++static const struct mwifiex_sdio_device mwifiex_sdio_sd8978 = { ++ .firmware_sdiouart = SD8978_SDIOUART_FW_NAME, ++ .reg = &mwifiex_reg_sd89xx, ++ .max_ports = 32, ++ .mp_agg_pkt_limit = 16, ++ .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K, ++ .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, ++ .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX, ++ .supports_sdio_new_mode = true, ++ .has_control_mask = false, ++ .can_dump_fw = true, ++ .fw_dump_enh = true, ++ .can_auto_tdls = false, ++ .can_ext_scan = true, ++}; ++ + static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = { + .firmware = SD8997_DEFAULT_FW_NAME, + .firmware_sdiouart = SD8997_SDIOUART_FW_NAME, +@@ -428,7 +444,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = { + + static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = { + .firmware = SD8987_DEFAULT_FW_NAME, +- .reg = &mwifiex_reg_sd8987, ++ .reg = &mwifiex_reg_sd89xx, + .max_ports = 32, + .mp_agg_pkt_limit = 16, + .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K, +@@ -482,7 +498,9 @@ static struct memory_type_mapping mem_type_mapping_tbl[] = { + static const struct of_device_id mwifiex_sdio_of_match_table[] __maybe_unused = { + { .compatible = "marvell,sd8787" }, + { .compatible = "marvell,sd8897" }, ++ { .compatible = "marvell,sd8978" }, + { .compatible = "marvell,sd8997" }, ++ { .compatible = "nxp,iw416" }, + { } + }; + +@@ -920,6 +938,8 @@ static const struct sdio_device_id mwifiex_ids[] = { + .driver_data = (unsigned long)&mwifiex_sdio_sd8801}, + {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN), + .driver_data = (unsigned long)&mwifiex_sdio_sd8977}, ++ {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8978_WLAN), ++ .driver_data = (unsigned long)&mwifiex_sdio_sd8978}, + {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN), + .driver_data = (unsigned long)&mwifiex_sdio_sd8987}, + {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN), +@@ -3164,6 +3184,7 @@ MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME); + MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME); + MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME); + MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME); ++MODULE_FIRMWARE(SD8978_SDIOUART_FW_NAME); + MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME); + MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME); + MODULE_FIRMWARE(SD8997_SDIOUART_FW_NAME); +diff --git a/drivers/net/wireless/marvell/mwifiex/sdio.h b/drivers/net/wireless/marvell/mwifiex/sdio.h +index 3a24bb48b299..ae94c172310f 100644 +--- a/drivers/net/wireless/marvell/mwifiex/sdio.h ++++ b/drivers/net/wireless/marvell/mwifiex/sdio.h +@@ -25,6 +25,7 @@ + #define SD8887_DEFAULT_FW_NAME "mrvl/sd8887_uapsta.bin" + #define SD8801_DEFAULT_FW_NAME "mrvl/sd8801_uapsta.bin" + #define SD8977_DEFAULT_FW_NAME "mrvl/sdsd8977_combo_v2.bin" ++#define SD8978_SDIOUART_FW_NAME "mrvl/sdiouartiw416_combo_v0.bin" + #define SD8987_DEFAULT_FW_NAME "mrvl/sd8987_uapsta.bin" + #define SD8997_DEFAULT_FW_NAME "mrvl/sdsd8997_combo_v4.bin" + #define SD8997_SDIOUART_FW_NAME "mrvl/sdiouart8997_combo_v4.bin" +diff --git a/include/linux/mmc/sdio_ids.h b/include/linux/mmc/sdio_ids.h +index 74f9d9a6d330..0e4ef9c5127a 100644 +--- a/include/linux/mmc/sdio_ids.h ++++ b/include/linux/mmc/sdio_ids.h +@@ -102,6 +102,7 @@ + #define SDIO_DEVICE_ID_MARVELL_8977_BT 0x9146 + #define SDIO_DEVICE_ID_MARVELL_8987_WLAN 0x9149 + #define SDIO_DEVICE_ID_MARVELL_8987_BT 0x914a ++#define SDIO_DEVICE_ID_MARVELL_8978_WLAN 0x9159 + + #define SDIO_VENDOR_ID_MEDIATEK 0x037a + #define SDIO_DEVICE_ID_MEDIATEK_MT7663 0x7663 +-- +2.43.0 + -- 2.47.3