From 2940a49ab7e31e9fc4f43637dc9ef75b5e8951d4 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Sat, 10 Jan 2026 03:45:24 +0200 Subject: [PATCH] arm: dts: lpc32xx: add interrupts property to Motor Control PWM Motor Control PWM shares an interrupt line with TIMER4 on MIC interrupt controller, the interrupt serves as period (timer limit), pulse-width (match) and capture event interrupt. Signed-off-by: Vladimir Zapolskiy --- arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi index 7fa91d1ac9eaa..e94df78def18a 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi @@ -322,6 +322,7 @@ mpwm: pwm@400e8000 { compatible = "nxp,lpc3220-motor-pwm"; reg = <0x400e8000 0x78>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; clocks = <&clk LPC32XX_CLK_MCPWM>; #pwm-cells = <3>; status = "disabled"; -- 2.47.3