From 2d924ca620387c371cd564c821682012b3c97481 Mon Sep 17 00:00:00 2001 From: Mihail Ionescu Date: Wed, 15 Jan 2020 11:31:35 +0000 Subject: [PATCH] [PATCH, GCC/ARM, 6/10] Clear GPRs inline when calling nscall function Besides changing the set of registers that needs to be cleared inline, this patch also generates the push and pop to save and restore callee-saved registers without trusting the callee inline. To make the code more future-proof, this (currently) Armv8.1-M specific behavior is expressed in terms of clearing of callee-saved registers rather than directly based on the targets. The patch contains 1 subtlety: Debug information is disabled for push and pop because the REG_CFA_RESTORE notes used to describe popping of registers do not stack. Instead, they just reset the debug state for the register to the one at the beginning of the function, which is incorrect for a register that is pushed twice (in prologue and before nonsecure call) and then popped for the first time. In particular, this occasionally trips CFI note creation code when there are two codepaths to the epilogue, one of which does not go through the nonsecure call. Obviously this mean that debugging between the push and pop is not reliable. *** gcc/ChangeLog *** 2020-01-16 Mihail-Calin Ionescu 2020-01-16 Thomas Preud'homme * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early. (cmse_nonsecure_call_clear_caller_saved): Rename into ... (cmse_nonsecure_call_inline_register_clear): This. Save and clear callee-saved GPRs as well as clear ip register before doing a nonsecure call then restore callee-saved GPRs after it when targeting Armv8.1-M Mainline. (arm_reorg): Adapt to function rename. *** gcc/testsuite/ChangeLog *** 2020-01-16 Mihail-Calin Ionescu 2020-01-16 Thomas Preud'homme * gcc.target/arm/cmse/cmse-1.c: Add check for PUSH and POP and update CLRM check. * gcc.target/arm/cmse/cmse-14.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/soft-sp/cmse-7.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/soft-sp/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/union-1.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/union-2.c: Likewise. --- gcc/ChangeLog | 11 +++ gcc/config/arm/arm.c | 71 ++++++++++++++++--- gcc/testsuite/ChangeLog | 30 ++++++++ gcc/testsuite/gcc.target/arm/cmse/cmse-1.c | 4 +- gcc/testsuite/gcc.target/arm/cmse/cmse-14.c | 4 +- .../arm/cmse/mainline/8_1m/bitfield-4.c | 4 +- .../arm/cmse/mainline/8_1m/bitfield-5.c | 4 +- .../arm/cmse/mainline/8_1m/bitfield-6.c | 4 +- .../arm/cmse/mainline/8_1m/bitfield-7.c | 4 +- .../arm/cmse/mainline/8_1m/bitfield-8.c | 4 +- .../arm/cmse/mainline/8_1m/bitfield-9.c | 4 +- .../cmse/mainline/8_1m/bitfield-and-union.c | 3 + .../arm/cmse/mainline/8_1m/hard-sp/cmse-13.c | 4 +- .../arm/cmse/mainline/8_1m/hard-sp/cmse-7.c | 4 +- .../arm/cmse/mainline/8_1m/hard-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/8_1m/hard/cmse-13.c | 4 +- .../arm/cmse/mainline/8_1m/hard/cmse-7.c | 4 +- .../arm/cmse/mainline/8_1m/hard/cmse-8.c | 4 +- .../arm/cmse/mainline/8_1m/soft/cmse-13.c | 4 +- .../arm/cmse/mainline/8_1m/soft/cmse-7.c | 4 +- .../arm/cmse/mainline/8_1m/soft/cmse-8.c | 4 +- .../arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c | 4 +- .../arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c | 4 +- .../arm/cmse/mainline/8_1m/softfp/cmse-13.c | 4 +- .../arm/cmse/mainline/8_1m/softfp/cmse-7.c | 4 +- .../arm/cmse/mainline/8_1m/softfp/cmse-8.c | 4 +- .../arm/cmse/mainline/8_1m/union-1.c | 4 +- .../arm/cmse/mainline/8_1m/union-2.c | 4 +- 28 files changed, 176 insertions(+), 35 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f709b62c1016..18767f5b4cd1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,17 @@ 2020-01-16 Mihail-Calin Ionescu 2020-01-16 Thomas Preud'homme + * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early. + (cmse_nonsecure_call_clear_caller_saved): Rename into ... + (cmse_nonsecure_call_inline_register_clear): This. Save and clear + callee-saved GPRs as well as clear ip register before doing a nonsecure + call then restore callee-saved GPRs after it when targeting + Armv8.1-M Mainline. + (arm_reorg): Adapt to function rename. + +2020-01-16 Mihail-Calin Ionescu +2020-01-16 Thomas Preud'homme + * config/arm/arm-protos.h (clear_operation_p): Adapt prototype. * config/arm/arm.c (clear_operation_p): Extend to be able to check a clear_vfp_multiple pattern based on a new vfp parameter. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 250517e6fca7..907e92d9588c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -187,6 +187,7 @@ static int arm_memory_move_cost (machine_mode, reg_class_t, bool); static void emit_constant_insn (rtx cond, rtx pattern); static rtx_insn *emit_set_insn (rtx, rtx); static rtx emit_multi_reg_push (unsigned long, unsigned long); +static void arm_emit_multi_reg_pop (unsigned long); static int arm_arg_partial_bytes (cumulative_args_t, const function_arg_info &); static rtx arm_function_arg (cumulative_args_t, const function_arg_info &); @@ -18263,13 +18264,13 @@ cmse_clear_registers (sbitmap to_clear_bitmap, uint32_t *padding_bits_to_clear, } } -/* Clears caller saved registers not used to pass arguments before a - cmse_nonsecure_call. Saving, clearing and restoring of callee saved - registers is done in __gnu_cmse_nonsecure_call libcall. - See libgcc/config/arm/cmse_nonsecure_call.S. */ +/* Clear core and caller-saved VFP registers not used to pass arguments before + a cmse_nonsecure_call. Saving, clearing and restoring of VFP callee-saved + registers is done in the __gnu_cmse_nonsecure_call libcall. See + libgcc/config/arm/cmse_nonsecure_call.S. */ static void -cmse_nonsecure_call_clear_caller_saved (void) +cmse_nonsecure_call_inline_register_clear (void) { basic_block bb; @@ -18279,8 +18280,15 @@ cmse_nonsecure_call_clear_caller_saved (void) FOR_BB_INSNS (bb, insn) { - unsigned address_regnum, regno, maxregno = - TARGET_HARD_FLOAT_ABI ? D7_VFP_REGNUM : NUM_ARG_REGS - 1; + bool clear_callee_saved = TARGET_HAVE_FPCXT_CMSE; + unsigned long callee_saved_mask + = ((1 << (LAST_HI_REGNUM + 1)) - 1) + & ~((1 << (LAST_ARG_REGNUM + 1)) - 1); + unsigned address_regnum, regno; + unsigned max_int_regno + = clear_callee_saved ? IP_REGNUM : LAST_ARG_REGNUM; + unsigned maxregno + = TARGET_HARD_FLOAT_ABI ? D7_VFP_REGNUM : max_int_regno; auto_sbitmap to_clear_bitmap (maxregno + 1); rtx_insn *seq; rtx pat, call, unspec, clearing_reg, ip_reg, shift; @@ -18312,9 +18320,11 @@ cmse_nonsecure_call_clear_caller_saved (void) || XINT (unspec, 1) != UNSPEC_NONSECURE_MEM) continue; - /* Determine the caller-saved registers we need to clear. */ + /* Mark registers that needs to be cleared. Those that holds a + parameter are removed from the set further below. */ bitmap_clear (to_clear_bitmap); - bitmap_set_range (to_clear_bitmap, R0_REGNUM, NUM_ARG_REGS); + bitmap_set_range (to_clear_bitmap, R0_REGNUM, + max_int_regno - R0_REGNUM + 1); /* Only look at the caller-saved floating point registers in case of -mfloat-abi=hard. For -mfloat-abi=softfp we will be using the @@ -18336,7 +18346,7 @@ cmse_nonsecure_call_clear_caller_saved (void) gcc_assert (MEM_P (address)); gcc_assert (REG_P (XEXP (address, 0))); address_regnum = REGNO (XEXP (address, 0)); - if (address_regnum < R0_REGNUM + NUM_ARG_REGS) + if (address_regnum <= max_int_regno) bitmap_clear_bit (to_clear_bitmap, address_regnum); /* Set basic block of call insn so that df rescan is performed on @@ -18396,6 +18406,15 @@ cmse_nonsecure_call_clear_caller_saved (void) shift = gen_rtx_ASHIFT (SImode, clearing_reg, const1_rtx); emit_insn (gen_rtx_SET (clearing_reg, shift)); + if (clear_callee_saved) + { + rtx push_insn = + emit_multi_reg_push (callee_saved_mask, callee_saved_mask); + /* Disable frame debug info in push because it needs to be + disabled for pop (see below). */ + RTX_FRAME_RELATED_P (push_insn) = 0; + } + /* Clear caller-saved registers that leak before doing a non-secure call. */ ip_reg = gen_rtx_REG (SImode, IP_REGNUM); @@ -18405,6 +18424,36 @@ cmse_nonsecure_call_clear_caller_saved (void) seq = get_insns (); end_sequence (); emit_insn_before (seq, insn); + + if (TARGET_HAVE_FPCXT_CMSE) + { + rtx_insn *next, *pop_insn, *after = insn; + + start_sequence (); + arm_emit_multi_reg_pop (callee_saved_mask); + pop_insn = get_last_insn (); + + /* Disable frame debug info in pop because they reset the state + of popped registers to what it was at the beginning of the + function, before the prologue. This leads to incorrect state + when doing the pop after the nonsecure call for registers that + are pushed both in prologue and before the nonsecure call. + + It also occasionally triggers an assert failure in CFI note + creation code when there are two codepaths to the epilogue, + one of which does not go through the nonsecure call. + Obviously this mean that debugging between the push and pop is + not reliable. */ + RTX_FRAME_RELATED_P (pop_insn) = 0; + + end_sequence (); + + emit_insn_after (pop_insn, after); + + /* Skip pop we have just inserted after nonsecure call, we know + it does not contain a nonsecure call. */ + insn = pop_insn; + } } } } @@ -18710,7 +18759,7 @@ arm_reorg (void) Mfix * fix; if (use_cmse) - cmse_nonsecure_call_clear_caller_saved (); + cmse_nonsecure_call_inline_register_clear (); /* We cannot run the Thumb passes for thunks because there is no CFG. */ if (cfun->is_thunk) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ac2ae996fc84..07fd7ff74d24 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,6 +1,36 @@ 2020-01-16 Mihail-Calin Ionescu 2020-01-16 Thomas Preud'homme + * gcc.target/arm/cmse/cmse-1.c: Add check for PUSH and POP and update + CLRM check. + * gcc.target/arm/cmse/cmse-14.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/soft-sp/cmse-7.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/soft-sp/cmse-8.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/softfp/union-1.c: Likewise. + * gcc.target/arm/cmse/mainline/8_1m/softfp/union-2.c: Likewise. + +2020-01-16 Mihail-Calin Ionescu +2020-01-16 Thomas Preud'homme + * gcc.target/arm/cmse/bitfield-1.c: Add check for VSCCLRM. * gcc.target/arm/cmse/bitfield-2.c: Likewise. * gcc.target/arm/cmse/bitfield-3.c: Likewise. diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c b/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c index 29d78ddd6166..9f36fa3b1d8b 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c +++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-1.c @@ -109,7 +109,9 @@ qux (int_nsfunc_t * callback) /* { dg-final { scan-assembler "clrm\t\{r1, r2, r3, ip, APSR\}" { target arm_cmse_clear_ok } } } */ /* { dg-final { scan-assembler "vldr\tFPCXTNS, \\\[sp\\\], #4" { target arm_cmse_clear_ok } } } */ /* { dg-final { scan-assembler "msr\tAPSR_nzcvq" { target { ! arm_cmse_clear_ok } } } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" { target arm_cmse_clear_ok } } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" { target arm_cmse_clear_ok } } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" { target arm_cmse_clear_ok } } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" { target arm_cmse_clear_ok } } } */ int call_callback (void) { diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c b/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c index 1f5af7c2dba7..6d39afab4432 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c +++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-14.c @@ -9,6 +9,8 @@ int foo (void) return bar (); } -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" { target arm_cmse_clear_ok } } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" { target arm_cmse_clear_ok } } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" { target arm_cmse_clear_ok } } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" { target arm_cmse_clear_ok } } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ /* { dg-final { scan-assembler-not "^(.*\\s)?bl?\[^\\s]*\\s+bar" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c index c52e1c14d995..d4caf513ed21 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-4.c @@ -12,5 +12,7 @@ /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c index fdba955a32fc..2b7655a2c997 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-5.c @@ -10,5 +10,7 @@ /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c index 85068ceaac6a..1a62076df9d6 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-6.c @@ -13,5 +13,7 @@ /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c index af69d38acf47..1319ac9766bc 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-7.c @@ -10,5 +10,7 @@ /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c index 62201595549f..9bb60175529d 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-8.c @@ -13,5 +13,7 @@ /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c index 287f0d6faad1..11ca78bfdaf1 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-9.c @@ -7,5 +7,7 @@ /* { dg-final { scan-assembler "and\tr0, r0, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c index 68f9e2254c97..2f14c52715e0 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/bitfield-and-union.c @@ -17,4 +17,7 @@ /* { dg-final { scan-assembler "and\tr3, r3, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c index 9719f799229e..67ced090163b 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c @@ -8,12 +8,14 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ /* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */ /* { dg-final { scan-assembler-not "vmov\.f32\ts2, #1\.0" } } */ /* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s1, VPR\}" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s4-s15, VPR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c index a6951d34afee..a6d9d14b63be 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-7.c @@ -8,8 +8,10 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s0-s15, VPR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c index 23db88dc66d5..ff4763529c7d 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-8.c @@ -8,10 +8,12 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ /* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */ /* { dg-final { scan-assembler-not "vmov\.f32\ts1, #1\.0" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s2-s15, VPR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c index 2898efabb2b3..952010baee36 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-13.c @@ -8,7 +8,8 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ /* { dg-final { scan-assembler-not "vmov\.f32\ts0, #1\.0" } } */ /* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */ /* { dg-final { scan-assembler-not "vmov\.f64\td1, #1\.0" } } */ @@ -16,6 +17,7 @@ /* { dg-final { scan-assembler-not "vmov\.f32\ts3, #1\.0" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s1, VPR\}" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s4-s15, VPR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c index a4520a9166e3..ec1284117f89 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-7.c @@ -8,8 +8,10 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s0-s15, VPR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c index c79d3188026d..d70a58a4c84c 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c @@ -8,9 +8,11 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ /* { dg-final { scan-assembler-not "vmov\.f64\td0, #1\.0" } } */ /* { dg-final { scan-assembler "vscclrm\t\{s2-s15, VPR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c index d43a9f85a199..07a6719b4f1a 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c @@ -10,7 +10,9 @@ /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr2, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr3, r4" } } */ -/* { dg-final { scan-assembler "clrm\t\{r1, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r1, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler-not "vmov" } } */ /* { dg-final { scan-assembler-not "vmsr" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c index 02e48157a2c6..ca2961ac18cc 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7.c @@ -7,7 +7,9 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler-not "vmov" } } */ /* { dg-final { scan-assembler-not "vmsr" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c index c7a22a2ba464..7a1abb51fcf9 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8.c @@ -9,7 +9,9 @@ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr1, r4" } } */ -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler-not "vmov" } } */ /* { dg-final { scan-assembler-not "vmsr" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c index d34ca383236f..90aadffb7aa1 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-7.c @@ -8,7 +8,9 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c index ff8e9816cff1..28f2e86dfaa8 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c @@ -10,7 +10,9 @@ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr1, r4" } } */ -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c index ff9a7dfa5e69..15d3b682c798 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-13.c @@ -11,7 +11,9 @@ /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr2, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr3, r4" } } */ -/* { dg-final { scan-assembler "clrm\t\{r1, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r1, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c index 03d36aa65098..3d48859028ab 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-7.c @@ -8,7 +8,9 @@ /* Checks for saving and clearing prior to function call. */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r0, r1, r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c index ce45e10688f8..0e2dcae36927 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-8.c @@ -10,7 +10,9 @@ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ /* { dg-final { scan-assembler-not "mov\tr0, r4" } } */ /* { dg-final { scan-assembler-not "mov\tr1, r4" } } */ -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* Now we check that we use the correct intrinsic to call. */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c index dbd1d34413ef..43e58ebde56c 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-1.c @@ -10,5 +10,7 @@ /* { dg-final { scan-assembler "and\tr1, r1, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r2, r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r2, r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c index 3edc7f1e2597..6adf8fae5c3a 100644 --- a/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c +++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/8_1m/union-2.c @@ -14,5 +14,7 @@ /* { dg-final { scan-assembler "and\tr2, r2, ip" } } */ /* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */ /* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */ -/* { dg-final { scan-assembler "clrm\t\{r3, APSR\}" } } */ +/* { dg-final { scan-assembler "push\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ +/* { dg-final { scan-assembler "clrm\t\{r3, r5, r6, r7, r8, r9, r10, fp, ip, APSR\}" } } */ +/* { dg-final { scan-assembler "pop\t\{r4, r5, r6, r7, r8, r9, r10, fp\}" } } */ /* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */ -- 2.47.2