From 2dd38a4b582c32efdb4f8316875e4c329e01ba32 Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Tue, 5 Mar 2013 10:35:44 +0000 Subject: [PATCH] Handle "vmov qDest.I32 V128{0xFFFF}" so to speak, and make the case for a zero immediate more similar. Verify assembled output against GNU as. Fixes #311318. git-svn-id: svn://svn.valgrind.org/vex/trunk@2693 --- VEX/priv/host_arm_isel.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/VEX/priv/host_arm_isel.c b/VEX/priv/host_arm_isel.c index c74613bab5..84d856bb35 100644 --- a/VEX/priv/host_arm_isel.c +++ b/VEX/priv/host_arm_isel.c @@ -3697,9 +3697,14 @@ static HReg iselNeonExpr_wrk ( ISelEnv* env, IRExpr* e ) generated during disassemble. They are represented as Iop_64HLtoV128 binary operation and are handled among binary ops. */ /* But zero can be created by valgrind internal optimizer */ - if (e->Iex.Const.con->Ico.V128 == 0) { + if (e->Iex.Const.con->Ico.V128 == 0x0000) { HReg res = newVRegV(env); - addInstr(env, ARMInstr_NeonImm(res, ARMNImm_TI(0, 0))); + addInstr(env, ARMInstr_NeonImm(res, ARMNImm_TI(6, 0))); + return res; + } + if (e->Iex.Const.con->Ico.V128 == 0xFFFF) { + HReg res = newVRegV(env); + addInstr(env, ARMInstr_NeonImm(res, ARMNImm_TI(6, 255))); return res; } ppIRExpr(e); -- 2.47.2