From 2e02254ef5f0c07980b39fb4c334b0e612b8581e Mon Sep 17 00:00:00 2001 From: Lukasz Laguna Date: Mon, 24 Nov 2025 20:02:37 +0100 Subject: [PATCH] drm/xe/pf: Handle MERT catastrophic errors MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The MERT block triggers an interrupt when a catastrophic error occurs. Update the interrupt handler to read the MERT catastrophic error type and log appropriate debug message. Signed-off-by: Lukasz Laguna Reviewed-by: Piotr Piórkowski Signed-off-by: Michal Wajdeczko Link: https://patch.msgid.link/20251124190237.20503-5-lukasz.laguna@intel.com --- drivers/gpu/drm/xe/regs/xe_mert_regs.h | 5 +++++ drivers/gpu/drm/xe/xe_mert.c | 11 +++++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_mert_regs.h b/drivers/gpu/drm/xe/regs/xe_mert_regs.h index aef66c04901d..c345e11ceea8 100644 --- a/drivers/gpu/drm/xe/regs/xe_mert_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_mert_regs.h @@ -10,6 +10,11 @@ #define MERT_LMEM_CFG XE_REG(0x1448b0) +#define MERT_TLB_CT_INTR_ERR_ID_PORT XE_REG(0x145190) +#define MERT_TLB_CT_VFID_MASK REG_GENMASK(16, 9) +#define MERT_TLB_CT_ERROR_MASK REG_GENMASK(5, 0) +#define MERT_TLB_CT_LMTT_FAULT 0x05 + #define MERT_TLB_INV_DESC_A XE_REG(0x14cf7c) #define MERT_TLB_INV_DESC_A_VALID REG_BIT(0) diff --git a/drivers/gpu/drm/xe/xe_mert.c b/drivers/gpu/drm/xe/xe_mert.c index 304cc8421999..f7689e922953 100644 --- a/drivers/gpu/drm/xe/xe_mert.c +++ b/drivers/gpu/drm/xe/xe_mert.c @@ -55,10 +55,21 @@ void xe_mert_irq_handler(struct xe_device *xe, u32 master_ctl) struct xe_tile *tile = xe_device_get_root_tile(xe); unsigned long flags; u32 reg_val; + u8 err; if (!(master_ctl & SOC_H2DMEMINT_IRQ)) return; + reg_val = xe_mmio_read32(&tile->mmio, MERT_TLB_CT_INTR_ERR_ID_PORT); + xe_mmio_write32(&tile->mmio, MERT_TLB_CT_INTR_ERR_ID_PORT, 0); + + err = FIELD_GET(MERT_TLB_CT_ERROR_MASK, reg_val); + if (err == MERT_TLB_CT_LMTT_FAULT) + drm_dbg(&xe->drm, "MERT catastrophic error: LMTT fault (VF%u)\n", + FIELD_GET(MERT_TLB_CT_VFID_MASK, reg_val)); + else if (err) + drm_dbg(&xe->drm, "MERT catastrophic error: Unexpected fault (0x%x)\n", err); + spin_lock_irqsave(&tile->mert.lock, flags); if (tile->mert.tlb_inv_triggered) { reg_val = xe_mmio_read32(&tile->mmio, MERT_TLB_INV_DESC_A); -- 2.47.3