From 3018e582da321c5f6d2f03847f9adb44e44cb0ee Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Wed, 19 Nov 2025 20:52:49 +0200 Subject: [PATCH] drm/i915/gmch: switch to use pci_bus_{read,write}_config_word() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Switch to use pci_bus_{read,write}_config_word(), and stop using i915->gmch.pdev reference for the bridge. Suggested-by: Ville Syrjälä Reviewed-by: Ville Syrjälä Link: https://patch.msgid.link/5c432540e254108bf73dbdec347d69ad87682fc9.1763578288.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/soc/intel_gmch.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c index 30f4894170647..d43b5d89cae73 100644 --- a/drivers/gpu/drm/i915/soc/intel_gmch.c +++ b/drivers/gpu/drm/i915/soc/intel_gmch.c @@ -18,10 +18,11 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode) { struct intel_display *display = i915->display; + struct pci_dev *pdev = to_pci_dev(display->drm->dev); unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; u16 gmch_ctrl; - if (pci_read_config_word(i915->gmch.pdev, reg, &gmch_ctrl)) { + if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) { drm_err(&i915->drm, "failed to read control word\n"); return -EIO; } @@ -34,7 +35,7 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode) else gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; - if (pci_write_config_word(i915->gmch.pdev, reg, gmch_ctrl)) { + if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) { drm_err(&i915->drm, "failed to write control word\n"); return -EIO; } -- 2.47.3