From 31e16c8b75bd49a9c5c01ada340da340c6f15c99 Mon Sep 17 00:00:00 2001 From: Tejas Belagod Date: Sun, 13 Apr 2025 01:08:00 +0530 Subject: [PATCH] AArch64: Fix operands order in vec_extract expander The operand order to gen_vcond_mask call in the vec_extract pattern is wrong. Fix the order where predicate is operand 3. Tested and bootstrapped on aarch64-linux-gnu. OK for trunk? gcc/ChangeLog * config/aarch64/aarch64-sve.md (vec_extract): Fix operand order to gen_vcond_mask_*. --- gcc/config/aarch64/aarch64-sve.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 3dbd65986ec..d4af3706294 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -3133,9 +3133,9 @@ "TARGET_SVE" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_vcond_mask_ (tmp, operands[1], - CONST1_RTX (mode), - CONST0_RTX (mode))); + emit_insn (gen_vcond_mask_ (tmp, CONST1_RTX (mode), + CONST0_RTX (mode), + operands[1])); emit_insn (gen_vec_extract (operands[0], tmp, operands[2])); DONE; } -- 2.47.2