From 3232ebd91ed55b275b9d5a6e8355336382c4afd5 Mon Sep 17 00:00:00 2001 From: Edwin Lu Date: Tue, 20 Feb 2024 13:53:40 -0800 Subject: [PATCH] RISC-V: Specify mtune and march for PR113742 The testcase pr113742.c is failing for 32 bit targets due to the following cc1 error: cc1: error: ABI requries '-march=rv64' Specify '-march=rv64gc' with '-mtune=sifive-p600-series' PR target/113742 gcc/testsuite/ChangeLog: * gcc.target/riscv/pr113742.c: change mcpu to mtune and add march Signed-off-by: Edwin Lu --- gcc/testsuite/gcc.target/riscv/pr113742.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/riscv/pr113742.c b/gcc/testsuite/gcc.target/riscv/pr113742.c index ab8934c2a8a3..573afd6f0ad9 100644 --- a/gcc/testsuite/gcc.target/riscv/pr113742.c +++ b/gcc/testsuite/gcc.target/riscv/pr113742.c @@ -1,4 +1,4 @@ -//* { dg-do compile } */ -/* { dg-options "-O2 -finstrument-functions -mabi=lp64d -mcpu=sifive-p670" } */ +/* { dg-do compile } */ +/* { dg-options "-O2 -finstrument-functions -march=rv64gc -mabi=lp64d -mtune=sifive-p600-series" } */ void foo(void) {} -- 2.47.2