From 325d5dd53270fe8fd62b36c92c8f8b87c2938bf1 Mon Sep 17 00:00:00 2001
From: Kito Cheng <kito.cheng@sifive.com>
Date: Fri, 16 Feb 2024 17:27:24 +0800
Subject: [PATCH] RISC-V: Fix *sge<u>_<X:mode><GPR:mode> pattern

*sge<u>_<X:mode><GPR:mode> pattern has referenced operand[2] which is
invalid...it should just use `slti<u>` rather than `slti%i2<u>`.

gcc/ChangeLog:

	PR target/106543
	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>): Fix asm
	pattern.
---
 gcc/config/riscv/riscv.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 39b29795cd6c..3f7a023d9410 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -3107,7 +3107,7 @@
 	(any_ge:GPR (match_operand:X 1 "register_operand" " r")
 		    (const_int 1)))]
   ""
-  "slt%i2<u>\t%0,zero,%1"
+  "slti<u>\t%0,zero,%1"
   [(set_attr "type" "slt")
    (set_attr "mode" "<X:MODE>")])
 
-- 
2.47.2