From 32b99dad9a59ce8d67350221f3cfb1986ee67a8f Mon Sep 17 00:00:00 2001 From: Richard Biener Date: Wed, 2 Oct 2024 13:39:14 +0200 Subject: [PATCH] Adjust expectation for gcc.dg/vect/slp-19c.c We can now vectorize the first loop with SLP when using V2SImode vectors since then we can handle the non-power-of-two interleaving. We can also SLP the second loop reliably now after adding induction support for VLA vectors. * gcc.dg/vect/slp-19c.c: Adjust expectation. --- gcc/testsuite/gcc.dg/vect/slp-19c.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.dg/vect/slp-19c.c b/gcc/testsuite/gcc.dg/vect/slp-19c.c index 188ab37a0b61..588c171dd835 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-19c.c +++ b/gcc/testsuite/gcc.dg/vect/slp-19c.c @@ -105,5 +105,9 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! vect64 } } } } */ +/* The unsupported interleaving works fine with V2SImode vectors given we + can always combine that from two vectors. */ +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target vect64 } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target { ! vect64 } } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" { target vect64 } } } */ -- 2.47.2