From 32d41517c7276399e57b2b3f29e9790ae32d4883 Mon Sep 17 00:00:00 2001 From: Juergen Christ Date: Tue, 8 Jul 2025 11:26:38 +0200 Subject: [PATCH] s390: Split tests for 31bit support The new vector pattern tests used int128 without guard. This causes failure on 31bit targets. Split the tests such that the tests requiring 128 bit support are only executed on targets supporting them. Signed-off-by: Juergen Christ gcc/testsuite/ChangeLog: * gcc.target/s390/vector/pattern-avg-1.c: Split test. * gcc.target/s390/vector/pattern-mulh-1.c: Split test. * gcc.target/s390/vector/pattern-avg-2.c: New test. * gcc.target/s390/vector/pattern-mulh-2.c: New test. --- .../gcc.target/s390/vector/pattern-avg-1.c | 3 +-- .../gcc.target/s390/vector/pattern-avg-2.c | 23 ++++++++++++++++ .../gcc.target/s390/vector/pattern-mulh-1.c | 3 +-- .../gcc.target/s390/vector/pattern-mulh-2.c | 26 +++++++++++++++++++ 4 files changed, 51 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/s390/vector/pattern-avg-2.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/pattern-mulh-2.c diff --git a/gcc/testsuite/gcc.target/s390/vector/pattern-avg-1.c b/gcc/testsuite/gcc.target/s390/vector/pattern-avg-1.c index a15301aabe5..30c6ed47684 100644 --- a/gcc/testsuite/gcc.target/s390/vector/pattern-avg-1.c +++ b/gcc/testsuite/gcc.target/s390/vector/pattern-avg-1.c @@ -21,6 +21,5 @@ TEST(char,short,16) TEST(short,int,8) TEST(int,long,4) -TEST(long,__int128,2) -/* { dg-final { scan-tree-dump-times "\.AVG_CEIL" 8 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.AVG_CEIL" 6 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/pattern-avg-2.c b/gcc/testsuite/gcc.target/s390/vector/pattern-avg-2.c new file mode 100644 index 00000000000..1cc614eb1de --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/pattern-avg-2.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O3 -mzarch -march=z16 -ftree-vectorize -fdump-tree-optimized" } */ + +#define TEST(T1,T2,N) \ + void \ + avg##T1 (signed T1 *__restrict res, signed T1 *__restrict a, \ + signed T1 *__restrict b) \ + { \ + for (int i = 0; i < N; ++i) \ + res[i] = ((signed T2)a[i] + b[i] + 1) >> 1; \ + } \ + \ + void \ + uavg##T1 (unsigned T1 *__restrict res, unsigned T1 *__restrict a, \ + unsigned T1 *__restrict b) \ + { \ + for (int i = 0; i < N; ++i) \ + res[i] = ((unsigned T2)a[i] + b[i] + 1) >> 1; \ + } + +TEST(long,__int128,2) + +/* { dg-final { scan-tree-dump-times "\.AVG_CEIL" 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-1.c b/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-1.c index cd8e4e7d7a0..f71ef06c825 100644 --- a/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-1.c +++ b/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-1.c @@ -24,6 +24,5 @@ TEST(char,short,16,8) TEST(short,int,8,16) TEST(int,long,4,32) -TEST(long,__int128,2,64) -/* { dg-final { scan-tree-dump-times "\.MULH" 8 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.MULH" 6 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-2.c b/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-2.c new file mode 100644 index 00000000000..6ac6855b1bd --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/pattern-mulh-2.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O3 -mzarch -march=arch15 -ftree-vectorize -fdump-tree-optimized" } */ + +#define TEST(T1,T2,N,S) \ + void \ + mulh##T1 (signed T1 *__restrict res, \ + signed T1 *__restrict l, \ + signed T1 *__restrict r) \ + { \ + for (int i = 0; i < N; ++i) \ + res[i] = (signed T1) (((signed T2)l[i] * (signed T2)r[i]) >> S); \ + } \ + \ + void \ + umulh##T1 (unsigned T1 *__restrict res, \ + unsigned T1 *__restrict l, \ + unsigned T1 *__restrict r) \ + { \ + for (int i = 0; i < N; ++i) \ + res[i] = (unsigned T1) \ + (((unsigned T2)l[i] * (unsigned T2)r[i]) >> S); \ + } + +TEST(long,__int128,2,64) + +/* { dg-final { scan-tree-dump-times "\.MULH" 2 "optimized" } } */ -- 2.47.2