From 38011f7248372e689ff1719e62c2aa987a728bb4 Mon Sep 17 00:00:00 2001 From: Nicholas Nethercote Date: Wed, 22 Nov 2006 11:38:07 +0000 Subject: [PATCH] Fix obscure bug in cache simulation, found by Ulrich Drepper. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@6365 --- cachegrind/cg_sim.c | 31 +++++++++---------------------- 1 file changed, 9 insertions(+), 22 deletions(-) diff --git a/cachegrind/cg_sim.c b/cachegrind/cg_sim.c index 90cae41050..cf5b7baf90 100644 --- a/cachegrind/cg_sim.c +++ b/cachegrind/cg_sim.c @@ -80,21 +80,6 @@ static void cachesim_initcache(cache_t config, cache_t2* c) c->tags[i] = 0; } -#if 0 -static void print_cache(cache_t2* c) -{ - UInt set, way, i; - - /* Note initialisation and update of 'i'. */ - for (i = 0, set = 0; set < c->sets; set++) { - for (way = 0; way < c->assoc; way++, i++) { - VG_(printf)("%16lx ", c->tags[i]); - } - VG_(printf)("\n"); - } -} -#endif - /* This is done as a macro rather than by passing in the cache_t2 as an * arg because it slows things down by a small amount (3-5%) due to all * that extra indirection. */ @@ -114,9 +99,10 @@ __attribute__((always_inline)) \ static __inline__ \ void cachesim_##L##_doref(Addr a, UChar size, ULong* m1, ULong *m2) \ { \ - register UInt set1 = ( a >> L.line_size_bits) & (L.sets_min_1); \ - register UInt set2 = ((a+size-1) >> L.line_size_bits) & (L.sets_min_1); \ - register UWord tag = a >> L.tag_shift; \ + UInt set1 = ( a >> L.line_size_bits) & (L.sets_min_1); \ + UInt set2 = ((a+size-1) >> L.line_size_bits) & (L.sets_min_1); \ + UWord tag = a >> L.tag_shift; \ + UWord tag2; \ Int i, j; \ Bool is_miss = False; \ UWord* set; \ @@ -176,22 +162,23 @@ void cachesim_##L##_doref(Addr a, UChar size, ULong* m1, ULong *m2) \ is_miss = True; \ block2: \ set = &(L.tags[set2 << L.assoc_bits]); \ - if (tag == set[0]) { \ + tag2 = (a+size-1) >> L.tag_shift; \ + if (tag2 == set[0]) { \ goto miss_treatment; \ } \ for (i = 1; i < L.assoc; i++) { \ - if (tag == set[i]) { \ + if (tag2 == set[i]) { \ for (j = i; j > 0; j--) { \ set[j] = set[j - 1]; \ } \ - set[0] = tag; \ + set[0] = tag2; \ goto miss_treatment; \ } \ } \ for (j = L.assoc - 1; j > 0; j--) { \ set[j] = set[j - 1]; \ } \ - set[0] = tag; \ + set[0] = tag2; \ is_miss = True; \ miss_treatment: \ if (is_miss) { MISS_TREATMENT; } \ -- 2.47.2