From 3bb4000c5f5f70cf5cb651314a939f1cbc65046d Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@embecosm.com>
Date: Wed, 22 Nov 2023 01:18:23 +0000
Subject: [PATCH] RISC-V: Reorder comment on SFB patterns

Our `mov<mode>cc' expander is no longer specific to short forward branch
targets, so move its associated comment accordingly.

	gcc/
	* config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
	patterns over to...
	(*mov<GPR:mode><X:mode>cc): ... here.
---
 gcc/config/riscv/riscv.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 1522b0b27ccd..e6d90c2265fe 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2655,8 +2655,6 @@
   [(set_attr "type" "branch")
    (set_attr "mode" "none")])
 
-;; Patterns for implementations that optimize short forward branches.
-
 (define_expand "mov<mode>cc"
   [(set (match_operand:GPR 0 "register_operand")
 	(if_then_else:GPR (match_operand 1 "comparison_operator")
@@ -2671,6 +2669,8 @@
     FAIL;
 })
 
+;; Patterns for implementations that optimize short forward branches.
+
 (define_insn "*mov<GPR:mode><X:mode>cc"
   [(set (match_operand:GPR 0 "register_operand" "=r,r")
 	(if_then_else:GPR
-- 
2.47.2