From 3c2b27fbf1c2e7b2d91c2b43a54dbcdf1771dcb0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Bernhard=20Rosenkr=C3=A4nzer?= Date: Sun, 1 Apr 2018 20:56:46 +0200 Subject: [PATCH] Add armv8 (32-bit mode of aarch64 CPUs) MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add some ARMv8 32-bit arches Signed-off-by: Bernhard Rosenkränzer --- src/poolarch.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/poolarch.c b/src/poolarch.c index 8da16c19..e4b49e2b 100644 --- a/src/poolarch.c +++ b/src/poolarch.c @@ -33,6 +33,10 @@ static const char *archpolicies[] = { "ppc64", "ppc64:ppc", "ppc64p7", "ppc64p7:ppc64:ppc", "ia64", "ia64:i686:i586:i486:i386", + "armv8hcnl", "armv8hcnl:armv8hnl:armv8hl:armv7hnl:armv7hl:armv6hl", + "armv8hnl", "armv8hnl:armv8hl:armv7hnl:armv7hl:armv6hl", + "armv8hl", "armv8hl:armv7hl:armv6hl", + "armv8l", "armv8l:armv7l:armv6l:armv5tejl:armv5tel:armv5tl:armv5l:armv4tl:armv4l:armv3l", "armv7hnl", "armv7hnl:armv7hl:armv6hl", "armv7hl", "armv7hl:armv6hl", "armv7l", "armv7l:armv6l:armv5tejl:armv5tel:armv5tl:armv5l:armv4tl:armv4l:armv3l", -- 2.47.2