From 3cad4369399a31277e9e20de723c665b30cba574 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Tue, 21 Oct 2025 22:13:23 -0500 Subject: [PATCH] arm64: tegra: Add interconnect properties for Tegra210 Add interconnect properties to the Memory Controller, External Memory Controller and the Display Controller nodes in order to describe the hardware interconnection. Signed-off-by: Aaron Kling Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 1b3fc151e49df..c196ceed93503 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -200,6 +200,19 @@ nvidia,outputs = <&dsia &dsib &sor0 &sor1>; nvidia,head = <0>; + + interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>, + <&mc TEGRA210_MC_DISPLAY0B &emc>, + <&mc TEGRA210_MC_DISPLAY0C &emc>, + <&mc TEGRA210_MC_DISPLAYHC &emc>, + <&mc TEGRA210_MC_DISPLAYD &emc>, + <&mc TEGRA210_MC_DISPLAYT &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor", + "wind", + "wint"; }; dc@54240000 { @@ -215,6 +228,15 @@ nvidia,outputs = <&dsia &dsib &sor0 &sor1>; nvidia,head = <1>; + + interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>, + <&mc TEGRA210_MC_DISPLAY0BB &emc>, + <&mc TEGRA210_MC_DISPLAY0CB &emc>, + <&mc TEGRA210_MC_DISPLAYHCB &emc>; + interconnect-names = "wina", + "winb", + "winc", + "cursor"; }; dsia: dsi@54300000 { @@ -988,6 +1010,7 @@ #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; }; emc: external-memory-controller@7001b000 { @@ -999,6 +1022,7 @@ clock-names = "emc"; interrupts = ; nvidia,memory-controller = <&mc>; + #interconnect-cells = <0>; #cooling-cells = <2>; }; -- 2.47.3