From 3e6c313f4f996ce73b80873b8172610003e90f35 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 24 Dec 2025 17:52:02 +0000 Subject: [PATCH] arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Enable CANFD Enable CANFD channel 1, which is available on the CN35 connector. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20251224175204.3400062-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index 252f1c21ff902..5d1da4de8af66 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -29,6 +29,13 @@ #define SD0_EMMC 1 #define SD0_SD (!SD0_EMMC) +/* + * To enable CANFD interface disable both eMMC and SD card on SDHI0 by + * setting SD0_EMMC and SD0_SD macros to 0 as pins P12_0 and P12_1 + * will be used for CANFD interface. + */ +#define CANFD_ENABLE (!SD0_EMMC && !SD0_SD) + /* * P17_4 = SD1_CD; DSW5[3] = ON; DSW19[1] = OFF; DSW19[2] = ON * P08_6 = SD1_IOVS; DSW5[3] = ON @@ -203,6 +210,18 @@ }; }; +#if CANFD_ENABLE +&canfd { + pinctrl-0 = <&can1_pins>; + pinctrl-names = "default"; + status = "okay"; + + channel1 { + status = "okay"; + }; +}; +#endif + #if I2C0 &i2c0 { pinctrl-0 = <&i2c0_pins>; @@ -239,6 +258,16 @@ }; &pinctrl { + /* + * CAN1 Pin Configuration: + * + * DSW5[1] ON; DSW5[2] OFF - Use P12_0 and P12_1 for CAN1 interface. + */ + can1_pins: can1-pins { + pinmux = , /* CANRX1 */ + ; /* CANTX1 */ + }; + /* * GMAC2 Pin Configuration: * -- 2.47.3