From 3f857377578740f73fbead7f154a56db20e05f82 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Tue, 14 Oct 2025 02:54:59 +0300 Subject: [PATCH] arm64: dts: qcom: sm8550-qrd: Enable CAMSS and S5K3M5 camera sensor Enable CAMSS IP and Samsung S5K3M5 camera sensor on SM8550-QRD board. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Konrad Dybcio Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20251013235500.1883847-3-vladimir.zapolskiy@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 46 +++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts index a3f4200a1145d..9af2a4fd02ea5 100644 --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts @@ -716,6 +716,52 @@ }; }; +&camss { + status = "okay"; + + vdda-phy-supply = <&vreg_l1e_0p88>; + vdda-pll-supply = <&vreg_l3e_1p2>; + + ports { + port@3 { + csiphy3_ep: endpoint { + clock-lanes = <4>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&cam_tele>; + }; + }; + }; +}; + +&cci1 { + status = "okay"; +}; + +&cci1_i2c0 { + sensor@10 { + compatible = "samsung,s5k3m5"; + reg = <0x10>; + clocks = <&camcc CAM_CC_MCLK3_CLK>; + assigned-clocks = <&camcc CAM_CC_MCLK3_CLK>; + assigned-clock-rates = <24000000>; + reset-gpios = <&tlmm 119 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&cam3_default>; + pinctrl-names = "default"; + afvdd-supply = <&vreg_l7n_2p96>; + avdd-supply = <&vreg_l4m_2p8>; + dovdd-supply = <&vreg_l5n_1p8>; + dvdd-supply = <&vreg_l2m_1p056>; + + port { + cam_tele: endpoint { + link-frequencies = /bits/ 64 <602500000>; + data-lanes = <0 1 2 3>; + remote-endpoint = <&csiphy3_ep>; + }; + }; + }; +}; + &i2c_master_hub_0 { status = "okay"; }; -- 2.47.3