From 3f93d35c9cd364bee222a6793e4af7baae305a7d Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 18 May 2025 14:21:34 +0300 Subject: [PATCH] drm/msm/dp: split MMSS_DP_DSC_DTO register write to a separate function It's the dp_panel's duty to clear the MMSS_DP_DSC_DTO register. Once DP driver gets DSC support, it will handle that register in other places too. Split a call to write 0x0 to that register to a separate function. Reviewed-by: Stephen Boyd Tested-by: Stephen Boyd # sc7180-trogdor Signed-off-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/654314/ Link: https://lore.kernel.org/r/20250518-fd-dp-audio-fixup-v6-1-2f0ec3ec000d@oss.qualcomm.com --- drivers/gpu/drm/msm/dp/dp_catalog.c | 9 ++++++++- drivers/gpu/drm/msm/dp/dp_catalog.h | 2 ++ drivers/gpu/drm/msm/dp/dp_ctrl.c | 2 ++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index 7b7eadb2f83b1..4f80eceb6ae19 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -486,7 +486,6 @@ void msm_dp_catalog_ctrl_config_msa(struct msm_dp_catalog *msm_dp_catalog, drm_dbg_dp(catalog->drm_dev, "mvid=0x%x, nvid=0x%x\n", mvid, nvid); msm_dp_write_link(catalog, REG_DP_SOFTWARE_MVID, mvid); msm_dp_write_link(catalog, REG_DP_SOFTWARE_NVID, nvid); - msm_dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0); } int msm_dp_catalog_ctrl_set_pattern_state_bit(struct msm_dp_catalog *msm_dp_catalog, @@ -1039,6 +1038,14 @@ void msm_dp_catalog_panel_tpg_disable(struct msm_dp_catalog *msm_dp_catalog) msm_dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 0x0); } +void msm_dp_catalog_panel_clear_dsc_dto(struct msm_dp_catalog *msm_dp_catalog) +{ + struct msm_dp_catalog_private *catalog = container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); + + msm_dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0); +} + static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx, size_t *len) { struct resource *res; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index 6678b0ac9a678..08bb42e91b779 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -92,6 +92,8 @@ void msm_dp_catalog_panel_tpg_enable(struct msm_dp_catalog *msm_dp_catalog, struct drm_display_mode *drm_mode); void msm_dp_catalog_panel_tpg_disable(struct msm_dp_catalog *msm_dp_catalog); +void msm_dp_catalog_panel_clear_dsc_dto(struct msm_dp_catalog *msm_dp_catalog); + struct msm_dp_catalog *msm_dp_catalog_get(struct device *dev); /* DP Audio APIs */ diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index a50bfafbb4ea8..4c0a19e14492d 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -2050,6 +2050,8 @@ int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, bool force_link_train pixel_rate_orig, ctrl->panel->msm_dp_mode.out_fmt_is_yuv_420); + msm_dp_catalog_panel_clear_dsc_dto(ctrl->catalog); + msm_dp_ctrl_setup_tr_unit(ctrl); msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); -- 2.47.2