From 41a8dcc8cb2ca69369c7616fbcaa63d728bf1d57 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sun, 15 Jan 2012 21:38:32 +0100 Subject: [PATCH] re PR rtl-optimization/51821 (64bit > 32bit conversion produces incorrect results with optimizations) PR rtl-optimization/51821 * recog.c (peep2_find_free_register): Determine clobbered registers from insn pattern. testsuite/ChangeLog: PR rtl-optimization/51821 * gcc.dg/pr51821.c: New test. From-SVN: r183200 --- gcc/ChangeLog | 10 +++++++--- gcc/recog.c | 11 +++++++---- gcc/testsuite/ChangeLog | 6 +++++- gcc/testsuite/gcc.dg/pr51821.c | 24 ++++++++++++++++++++++++ 4 files changed, 43 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr51821.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2343769cc51c..c6f4672e32f2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,7 +1,12 @@ +2012-01-15 Uros Bizjak + + PR rtl-optimization/51821 + * recog.c (peep2_find_free_register): Determine clobbered registers + from insn pattern. + 2012-01-09 Richard Sandiford - * config/mips/mips.md (loadgp_newabi_): Add missing - earlyclobber. + * config/mips/mips.md (loadgp_newabi_): Add missing earlyclobber. 2011-12-21 Uros Bizjak @@ -16,7 +21,6 @@ 2011-12-09 Kazu Hirata Backport from mainline: - 2011-12-05 Kazu Hirata PR target/51408 diff --git a/gcc/recog.c b/gcc/recog.c index 70370e3ad816..587ad1b092a6 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -2933,6 +2933,7 @@ peep2_find_free_register (int from, int to, const char *class_str, static int search_ofs; enum reg_class cl; HARD_REG_SET live; + df_ref *def_rec; int i; gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1); @@ -2950,13 +2951,15 @@ peep2_find_free_register (int from, int to, const char *class_str, while (from != to) { - HARD_REG_SET this_live; + gcc_assert (peep2_insn_data[from].insn != NULL_RTX); + + /* Don't use registers set or clobbered by the insn. */ + for (def_rec = DF_INSN_DEFS (peep2_insn_data[from].insn); + *def_rec; def_rec++) + SET_HARD_REG_BIT (live, DF_REF_REGNO (*def_rec)); if (++from >= MAX_INSNS_PER_PEEP2 + 1) from = 0; - gcc_assert (peep2_insn_data[from].insn != NULL_RTX); - REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before); - IOR_HARD_REG_SET (live, this_live); } cl = (class_str[0] == 'r' ? GENERAL_REGS diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6bcd073a0e58..088b119e308c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,7 +1,11 @@ +2012-01-15 Uros Bizjak + + PR rtl-optimization/51821 + * gcc.dg/pr51821.c: New test. + 2011-12-09 Kazu Hirata Backport from mainline: - 2011-12-05 Kazu Hirata PR target/51408 diff --git a/gcc/testsuite/gcc.dg/pr51821.c b/gcc/testsuite/gcc.dg/pr51821.c new file mode 100644 index 000000000000..e7ba409fb701 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr51821.c @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -msse" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */ + +extern void abort (void); + +unsigned int __attribute__((noinline)) +test (int shift_size) +{ + unsigned long long res = ~0; + + return res << shift_size; +} + +int +main () +{ + int dst = 32; + + if (test (dst) != 0) + abort (); + + return 0; +} -- 2.47.2