From 45515eec6662dee31a66bd06110ca0b8ded38574 Mon Sep 17 00:00:00 2001 From: Suman Kumar Chakraborty Date: Thu, 10 Jul 2025 14:33:46 +0100 Subject: [PATCH] crypto: qat - add compression slice count for rate limiting In QAT GEN4 devices, the compression slice count was tracked using the dcpr_cnt field. Introduce a new cpr_cnt field in the rate limiting (RL) infrastructure to track the compression (CPR) slice count independently. The cpr_cnt value is populated via the RL_INIT admin message. The existing dcpr_cnt field will now be used exclusively to cache the decompression slice count, ensuring a clear separation between compression and decompression tracking. Signed-off-by: Suman Kumar Chakraborty Reviewed-by: Giovanni Cabiddu Signed-off-by: Herbert Xu --- drivers/crypto/intel/qat/qat_common/adf_rl.h | 1 + drivers/crypto/intel/qat/qat_common/adf_rl_admin.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl.h b/drivers/crypto/intel/qat/qat_common/adf_rl.h index 59f8859161577..c1f3f9a511958 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_rl.h +++ b/drivers/crypto/intel/qat/qat_common/adf_rl.h @@ -68,6 +68,7 @@ struct rl_slice_cnt { u8 dcpr_cnt; u8 pke_cnt; u8 cph_cnt; + u8 cpr_cnt; }; struct adf_rl_interface_data { diff --git a/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c b/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c index 698a14f4ce66a..4a3e0591fdba9 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c +++ b/drivers/crypto/intel/qat/qat_common/adf_rl_admin.c @@ -63,6 +63,7 @@ int adf_rl_send_admin_init_msg(struct adf_accel_dev *accel_dev, slices_int->pke_cnt = slices_resp.pke_cnt; /* For symmetric crypto, slice tokens are relative to the UCS slice */ slices_int->cph_cnt = slices_resp.ucs_cnt; + slices_int->cpr_cnt = slices_resp.cpr_cnt; return 0; } -- 2.47.2