From 47c88244ecfcd5585a61b3a50f823f06b59273dc Mon Sep 17 00:00:00 2001 From: Jeroen Dobbelaere Date: Fri, 20 Sep 2002 14:01:24 +0000 Subject: [PATCH] Jeroen Dobbelaere Jeroen Dobbelaere * config/arm/arm.md (sign_extract_onebit, not_signextract_onebit): Add clobber of the condition code register. From-SVN: r57348 --- gcc/ChangeLog | 5 +++++ gcc/config/arm/arm.md | 6 ++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eda02218a36e..0b9583504323 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2002-09-20 Jeroen Dobbelaere + + * config/arm/arm.md (sign_extract_onebit, not_signextract_onebit): + Add clobber of the condition code register. + 2002-09-18 Richard Earnshaw (rearnsha@arm.com) PR optimization/7967 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index e4de911de0e9..5180c75933a2 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8948,7 +8948,8 @@ [(set (match_operand:SI 0 "s_register_operand" "=r") (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r") (const_int 1) - (match_operand:SI 2 "const_int_operand" "n")))] + (match_operand:SI 2 "const_int_operand" "n"))) + (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" "* operands[2] = GEN_INT (1 << INTVAL (operands[2])); @@ -8964,7 +8965,8 @@ (not:SI (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r") (const_int 1) - (match_operand:SI 2 "const_int_operand" "n"))))] + (match_operand:SI 2 "const_int_operand" "n")))) + (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" "* operands[2] = GEN_INT (1 << INTVAL (operands[2])); -- 2.47.2