From 480268596fac7f9e4b8e9b544ac5aecff5abca2d Mon Sep 17 00:00:00 2001 From: George Moussalem Date: Fri, 30 May 2025 09:19:29 +0400 Subject: [PATCH] qualcommax: ipq50xx: fix uniphy soft reset issue The resets in the GCC of the uniphy found in the IPQ5018 SoC are incorrect which broke the ability to shift between 1G and 2.5G link speeds. So let's correct the resets based on below two downstream commits. In a seperate and prequisite PR to the QCA-SSDK repo, logic has been implemented to select the right reset based on the link setup so fixed link scenarios don't break. Signed-off-by: George Moussalem Link: https://github.com/openwrt/openwrt/pull/18774 Signed-off-by: Robert Marko --- ...-ipq5018-fix-uniphy-soft-reset-issue.patch | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 target/linux/qualcommax/patches-6.12/0723-clk-qcom-gcc-ipq5018-fix-uniphy-soft-reset-issue.patch diff --git a/target/linux/qualcommax/patches-6.12/0723-clk-qcom-gcc-ipq5018-fix-uniphy-soft-reset-issue.patch b/target/linux/qualcommax/patches-6.12/0723-clk-qcom-gcc-ipq5018-fix-uniphy-soft-reset-issue.patch new file mode 100644 index 00000000000..f4d77427224 --- /dev/null +++ b/target/linux/qualcommax/patches-6.12/0723-clk-qcom-gcc-ipq5018-fix-uniphy-soft-reset-issue.patch @@ -0,0 +1,22 @@ +From: George Moussalem +Date: Fri, 30 May 2025 09:12:23 +0400 +Subject: [PATCH] clk: qcom: gcc-ipq5018: fix UNIPHY soft reset issue + +The SOFT reset is supposed to trigger a resets across the SYS, RX, and +TX lines of the IPQ5018 UNIPHY. So let's set the bitmask of the reset +definition accordingly in the GCC as per the downstream driver. + +Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/036bdc62aca561e8ff94a29c447fc400de2b7304 + +Signed-off-by: George Moussalem +--- a/drivers/clk/qcom/gcc-ipq5018.c ++++ b/drivers/clk/qcom/gcc-ipq5018.c +@@ -3647,7 +3647,7 @@ static const struct qcom_reset_map gcc_i + [GCC_UNIPHY_SYS_ARES] = { 0x56104, 1 }, + [GCC_UNIPHY_RX_ARES] = { 0x56104, 4 }, + [GCC_UNIPHY_TX_ARES] = { 0x56104, 5 }, +- [GCC_UNIPHY_SOFT_RESET] = {0x56104, 0 }, ++ [GCC_UNIPHY_SOFT_RESET] = {0x56104, .bitmask = 0x32 }, + [GCC_USB0_BCR] = { 0x3e070, 0 }, + [GCC_USB0_PHY_BCR] = { 0x3e034, 0 }, + [GCC_WCSS_BCR] = { 0x18000, 0 }, -- 2.47.2