From 48669f526deae089f23f75638819e7bb90c57d32 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 8 Oct 2025 14:55:03 -0700 Subject: [PATCH] target/arm: Enable TCR2_ELx.PIE Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson Message-id: 20251008215613.300150-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index b7bf45afc1..c9ebdf144e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5902,8 +5902,12 @@ static CPAccessResult tcr2_el1_access(CPUARMState *env, const ARMCPRegInfo *ri, static void tcr2_el1_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { + ARMCPU *cpu = env_archcpu(env); uint64_t valid_mask = 0; + if (cpu_isar_feature(aa64_s1pie, cpu)) { + valid_mask |= TCR2_PIE; + } value &= valid_mask; raw_write(env, ri, value); } @@ -5911,8 +5915,12 @@ static void tcr2_el1_write(CPUARMState *env, const ARMCPRegInfo *ri, static void tcr2_el2_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { + ARMCPU *cpu = env_archcpu(env); uint64_t valid_mask = 0; + if (cpu_isar_feature(aa64_s1pie, cpu)) { + valid_mask |= TCR2_PIE; + } value &= valid_mask; raw_write(env, ri, value); } -- 2.47.3