From 4f310f180373bd0e68311debee7a0dddb14c1656 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Tue, 13 Jan 2026 01:20:50 +0200 Subject: [PATCH] phy: rockchip: samsung-hdptx: Fix coding style alignment Handle a bunch of reported checkpatch.pl complaints: CHECK: Alignment should match open parenthesis Signed-off-by: Cristian Ciocaltea Reviewed-by: Neil Armstrong Link: https://patch.msgid.link/20260113-phy-hdptx-frl-v6-3-8d5f97419c0b@collabora.com Signed-off-by: Vinod Koul --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c index 89710066d70c..3f8a7f4f5cd8 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -1624,11 +1624,11 @@ static void rk_hdptx_phy_set_voltage(struct rk_hdptx_phy *hdptx, regmap_update_bits(hdptx->regmap, LANE_REG(030a) + offset, LN_TX_JEQ_EVEN_CTRL_RBR_MASK, FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_RBR_MASK, - ctrl->tx_jeq_even_ctrl)); + ctrl->tx_jeq_even_ctrl)); regmap_update_bits(hdptx->regmap, LANE_REG(030c) + offset, LN_TX_JEQ_ODD_CTRL_RBR_MASK, FIELD_PREP(LN_TX_JEQ_ODD_CTRL_RBR_MASK, - ctrl->tx_jeq_odd_ctrl)); + ctrl->tx_jeq_odd_ctrl)); regmap_update_bits(hdptx->regmap, LANE_REG(0311) + offset, LN_TX_SER_40BIT_EN_RBR_MASK, FIELD_PREP(LN_TX_SER_40BIT_EN_RBR_MASK, 0x1)); @@ -1638,11 +1638,11 @@ static void rk_hdptx_phy_set_voltage(struct rk_hdptx_phy *hdptx, regmap_update_bits(hdptx->regmap, LANE_REG(030b) + offset, LN_TX_JEQ_EVEN_CTRL_HBR_MASK, FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR_MASK, - ctrl->tx_jeq_even_ctrl)); + ctrl->tx_jeq_even_ctrl)); regmap_update_bits(hdptx->regmap, LANE_REG(030d) + offset, LN_TX_JEQ_ODD_CTRL_HBR_MASK, FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR_MASK, - ctrl->tx_jeq_odd_ctrl)); + ctrl->tx_jeq_odd_ctrl)); regmap_update_bits(hdptx->regmap, LANE_REG(0311) + offset, LN_TX_SER_40BIT_EN_HBR_MASK, FIELD_PREP(LN_TX_SER_40BIT_EN_HBR_MASK, 0x1)); @@ -1653,11 +1653,11 @@ static void rk_hdptx_phy_set_voltage(struct rk_hdptx_phy *hdptx, regmap_update_bits(hdptx->regmap, LANE_REG(030b) + offset, LN_TX_JEQ_EVEN_CTRL_HBR2_MASK, FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR2_MASK, - ctrl->tx_jeq_even_ctrl)); + ctrl->tx_jeq_even_ctrl)); regmap_update_bits(hdptx->regmap, LANE_REG(030d) + offset, LN_TX_JEQ_ODD_CTRL_HBR2_MASK, FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR2_MASK, - ctrl->tx_jeq_odd_ctrl)); + ctrl->tx_jeq_odd_ctrl)); regmap_update_bits(hdptx->regmap, LANE_REG(0311) + offset, LN_TX_SER_40BIT_EN_HBR2_MASK, FIELD_PREP(LN_TX_SER_40BIT_EN_HBR2_MASK, 0x1)); -- 2.47.3