From 532f6f602e0653d037684822f8ef72e734717f35 Mon Sep 17 00:00:00 2001 From: Gustavo Sousa Date: Mon, 1 Dec 2025 17:23:04 -0800 Subject: [PATCH] drm/i915/display: Use platform check in HAS_LT_PHY() NVL uses the Lake Tahoe PHY for display output and the driver recently added the macro HAS_LT_PHY() to allow selecting code paths specific for that type of PHY. While NVL uses Xe3p_LPD as display IP, the type of PHY is actually defined at the SoC level, so use a platform check instead of display version. Bspec: 74199 Cc: Suraj Kandpal Cc: Matt Roper Reviewed-by: Matt Roper Reviewed-by: Dnyaneshwar Bhadane Signed-off-by: Gustavo Sousa Link: https://patch.msgid.link/20251202012306.9315-7-matthew.s.atwood@intel.com Signed-off-by: Matt Roper --- drivers/gpu/drm/i915/display/intel_lt_phy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h b/drivers/gpu/drm/i915/display/intel_lt_phy.h index b7911acd7dcda..0820968e51b57 100644 --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h @@ -42,6 +42,6 @@ void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_xe3plpd_pll_disable(struct intel_encoder *encoder); -#define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35) +#define HAS_LT_PHY(display) ((display)->platform.novalake) #endif /* __INTEL_LT_PHY_H__ */ -- 2.47.3