From 569ed828defa070c4b38aca1986d460577e375d5 Mon Sep 17 00:00:00 2001 From: Tomasz Nowicki Date: Wed, 29 Mar 2017 14:16:13 +0200 Subject: [PATCH] PCI/ACPI: Add ThunderX pass2.x 2nd node MCFG quirk commit cd183740480f045600aa1fa38fe70809b5498f05 upstream. Currently SoCs pass2.x do not emulate EA headers for ACPI boot method at all. However, for pass2.x some devices (like EDAC) advertise incorrect base addresses in their BARs which results in driver probe failure during resource request. Since all problematic blocks are on 2nd NUMA node under domain 10 add necessary quirk entry to obtain BAR addresses correction using EA header emulation. Fixes: 44f22bd91e88 ("PCI: Add MCFG quirks for Cavium ThunderX pass2.x host controller") Signed-off-by: Tomasz Nowicki Signed-off-by: Bjorn Helgaas Acked-by: Robert Richter Signed-off-by: Greg Kroah-Hartman --- drivers/acpi/pci_mcfg.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c index 65affd8f29c13..a4e8432fc2fba 100644 --- a/drivers/acpi/pci_mcfg.c +++ b/drivers/acpi/pci_mcfg.c @@ -101,6 +101,7 @@ static struct mcfg_fixup mcfg_quirks[] = { /* SoC pass2.x */ THUNDER_PEM_QUIRK(1, 0), THUNDER_PEM_QUIRK(1, 1), + THUNDER_ECAM_QUIRK(1, 10), /* SoC pass1.x */ THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */ -- 2.47.2