From 57cf9d5e45a88a4d3543dfd32c78f9bedca1b110 Mon Sep 17 00:00:00 2001 From: Mika Kahola Date: Mon, 17 Nov 2025 12:45:56 +0200 Subject: [PATCH] drm/i915/cx0: Add MTL+ .get_freq hook Add .get_freq hook to support dpll framework for MTL+ platforms. Signed-off-by: Mika Kahola Reviewed-by: Suraj Kandpal Link: https://lore.kernel.org/r/20251117104602.2363671-27-mika.kahola@intel.com --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index beaf270294ca3..85b3fee2d9b60 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4379,8 +4379,21 @@ static bool mtl_pll_get_hw_state(struct intel_display *display, return intel_cx0pll_readout_hw_state(encoder, &dpll_hw_state->cx0pll); } +static int mtl_pll_get_freq(struct intel_display *display, + const struct intel_dpll *pll, + const struct intel_dpll_hw_state *dpll_hw_state) +{ + struct intel_encoder *encoder = get_intel_encoder(display, pll); + + if (drm_WARN_ON(display->drm, !encoder)) + return -EINVAL; + + return intel_cx0pll_calc_port_clock(encoder, &dpll_hw_state->cx0pll); +} + static const struct intel_dpll_funcs mtl_pll_funcs = { .get_hw_state = mtl_pll_get_hw_state, + .get_freq = mtl_pll_get_freq, }; static const struct dpll_info mtl_plls[] = { -- 2.47.3