From 599c994c28a8d94875d0a5fa8779fbff390db7d8 Mon Sep 17 00:00:00 2001 From: Perry Yuan Date: Fri, 13 Mar 2026 16:31:07 +0800 Subject: [PATCH] drm/amdgpu/gfx9.4.3: skip PTL disable during GPU reset During RAS UE-triggered GPU reset, gfx_v9_4_3_hw_fini() attempts to send a PTL disable command to PSP. Since PSP is unresponsive at that point, this produces spurious error logs on all hive nodes: PTL command 0xa0000001 failed, PSP response status: 0xFFFFFFFF PTL initialization failed (-5) Skip the PTL disable command when GPU reset is in progress, as PTL will be properly re-initialized during post-reset recovery via gfx_v9_4_3_late_init(). Signed-off-by: Perry Yuan Reviewed-by: Yifan Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index d0e7212519f9b..f895c3ef56bc0 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -2443,7 +2443,7 @@ static int gfx_v9_4_3_hw_fini(struct amdgpu_ip_block *ip_block) struct amdgpu_device *adev = ip_block->adev; int i, num_xcc; - if (adev->psp.ptl.hw_supported) + if (adev->psp.ptl.hw_supported && !amdgpu_in_reset(adev)) gfx_v9_4_3_perf_monitor_ptl_init(adev, false); amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0); -- 2.47.3