From 5a74c2d874a9f8464d09c004364baec514abb45b Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Thu, 20 Nov 2014 11:30:41 +0000 Subject: [PATCH] arm64: enable FCVT{A,N}S X,S. git-svn-id: svn://svn.valgrind.org/vex/trunk@2997 --- VEX/priv/guest_arm64_toIR.c | 1 + 1 file changed, 1 insertion(+) diff --git a/VEX/priv/guest_arm64_toIR.c b/VEX/priv/guest_arm64_toIR.c index 41ade614d2..1a6e320a77 100644 --- a/VEX/priv/guest_arm64_toIR.c +++ b/VEX/priv/guest_arm64_toIR.c @@ -12502,6 +12502,7 @@ Bool dis_AdvSIMD_fp_to_from_int_conv(/*MB_OUT*/DisResult* dres, UInt insn) || (iop == Iop_F32toI32U && irrm == Irrm_NEAREST)/* FCVT{A,N}U W,S */ /* F32toI64S */ || (iop == Iop_F32toI64S && irrm == Irrm_ZERO) /* FCVTZS Xd,Sn */ + || (iop == Iop_F32toI64S && irrm == Irrm_NEAREST)/* FCVT{A,N}S X,S */ /* F32toI64U */ || (iop == Iop_F32toI64U && irrm == Irrm_ZERO) /* FCVTZU Xd,Sn */ || (iop == Iop_F32toI64U && irrm == Irrm_PosINF) /* FCVTPU Xd,Sn */ -- 2.47.2