From 5acb925409e2f089e6e25212ae64d13dea6b464a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 23 Dec 2025 16:24:45 +0100 Subject: [PATCH] arm64: dts: altera: Use lowercase hex The DTS code coding style expects lowercase hex for values and unit addresses. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Dinh Nguyen --- .../boot/dts/altera/socfpga_stratix10.dtsi | 2 +- .../dts/altera/socfpga_stratix10_socdk.dts | 2 +- .../altera/socfpga_stratix10_socdk_nand.dts | 4 +- .../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 48 +++++++++---------- .../boot/dts/intel/socfpga_agilex_socdk.dts | 2 +- .../boot/dts/intel/socfpga_n5x_socdk.dts | 4 +- 6 files changed, 31 insertions(+), 31 deletions(-) diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 657e986e5dba7..0d9cad0c03513 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -382,7 +382,7 @@ pinctrl0: pinctrl@ffd13000 { compatible = "pinctrl-single"; - reg = <0xffd13000 0xA0>; + reg = <0xffd13000 0xa0>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x0000000f>; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index 58f776e411fc3..4ae18a013bbed 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -192,7 +192,7 @@ root: partition@4200000 { label = "Root Filesystem - UBIFS"; - reg = <0x04200000 0x0BE00000>; + reg = <0x04200000 0x0be00000>; }; }; }; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts index 92954c5beb543..7951ce46ae1f6 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts @@ -174,12 +174,12 @@ qspi_boot: partition@0 { label = "Boot and fpga data"; - reg = <0x0 0x03FE0000>; + reg = <0x0 0x03fe0000>; }; qspi_rootfs: partition@3fe0000 { label = "Root Filesystem - JFFS2"; - reg = <0x03FE0000 0x0C020000>; + reg = <0x03fe0000 0x0c020000>; }; }; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index db8d5c4268219..a98bd23c3fa2e 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -622,31 +622,31 @@ snps,dcb-algorithm; }; queue1 { - snps,weight = <0x0A>; + snps,weight = <0x0a>; snps,dcb-algorithm; }; queue2 { - snps,weight = <0x0B>; + snps,weight = <0x0b>; snps,coe-unsupported; snps,dcb-algorithm; }; queue3 { - snps,weight = <0x0C>; + snps,weight = <0x0c>; snps,coe-unsupported; snps,dcb-algorithm; }; queue4 { - snps,weight = <0x0D>; + snps,weight = <0x0d>; snps,coe-unsupported; snps,dcb-algorithm; }; queue5 { - snps,weight = <0x0E>; + snps,weight = <0x0e>; snps,coe-unsupported; snps,dcb-algorithm; }; queue6 { - snps,weight = <0x0F>; + snps,weight = <0x0f>; snps,coe-unsupported; snps,dcb-algorithm; }; @@ -735,31 +735,31 @@ snps,dcb-algorithm; }; queue1 { - snps,weight = <0x0A>; + snps,weight = <0x0a>; snps,dcb-algorithm; }; queue2 { - snps,weight = <0x0B>; + snps,weight = <0x0b>; snps,coe-unsupported; snps,dcb-algorithm; }; queue3 { - snps,weight = <0x0C>; + snps,weight = <0x0c>; snps,coe-unsupported; snps,dcb-algorithm; }; queue4 { - snps,weight = <0x0D>; + snps,weight = <0x0d>; snps,coe-unsupported; snps,dcb-algorithm; }; queue5 { - snps,weight = <0x0E>; + snps,weight = <0x0e>; snps,coe-unsupported; snps,dcb-algorithm; }; queue6 { - snps,weight = <0x0F>; + snps,weight = <0x0f>; snps,coe-unsupported; snps,dcb-algorithm; }; @@ -848,31 +848,31 @@ snps,dcb-algorithm; }; queue1 { - snps,weight = <0x0A>; + snps,weight = <0x0a>; snps,dcb-algorithm; }; queue2 { - snps,weight = <0x0B>; + snps,weight = <0x0b>; snps,coe-unsupported; snps,dcb-algorithm; }; queue3 { - snps,weight = <0x0C>; + snps,weight = <0x0c>; snps,coe-unsupported; snps,dcb-algorithm; }; queue4 { - snps,weight = <0x0D>; + snps,weight = <0x0d>; snps,coe-unsupported; snps,dcb-algorithm; }; queue5 { - snps,weight = <0x0E>; + snps,weight = <0x0e>; snps,coe-unsupported; snps,dcb-algorithm; }; queue6 { - snps,weight = <0x0F>; + snps,weight = <0x0f>; snps,coe-unsupported; snps,dcb-algorithm; }; @@ -918,24 +918,24 @@ pmu0_tbu3: pmu@160a2000 { compatible = "arm,smmu-v3-pmcg"; - reg = <0x160A2000 0x1000>, - <0x160B2000 0x1000>; + reg = <0x160a2000 0x1000>, + <0x160b2000 0x1000>; interrupt-parent = <&intc>; interrupts = ; }; pmu0_tbu4: pmu@160c2000 { compatible = "arm,smmu-v3-pmcg"; - reg = <0x160C2000 0x1000>, - <0x160D2000 0x1000>; + reg = <0x160c2000 0x1000>, + <0x160d2000 0x1000>; interrupt-parent = <&intc>; interrupts = ; }; pmu0_tbu5: pmu@160e2000 { compatible = "arm,smmu-v3-pmcg"; - reg = <0x160E2000 0x1000>, - <0x160F2000 0x1000>; + reg = <0x160e2000 0x1000>, + <0x160f2000 0x1000>; interrupt-parent = <&intc>; interrupts = ; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index 9ee312bae8d27..8f8a5423ba027 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -131,7 +131,7 @@ root: partition@4200000 { label = "Root Filesystem - UBIFS"; - reg = <0x04200000 0x0BE00000>; + reg = <0x04200000 0x0be00000>; }; }; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 0034a48972209..d7d500f50a07a 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -103,12 +103,12 @@ qspi_boot: partition@0 { label = "Boot and fpga data"; - reg = <0x0 0x03FE0000>; + reg = <0x0 0x03fe0000>; }; qspi_rootfs: partition@3fe0000 { label = "Root Filesystem - JFFS2"; - reg = <0x03FE0000 0x0C020000>; + reg = <0x03fe0000 0x0c020000>; }; }; }; -- 2.47.3