From 5bd746e212b0fac12cfe7332a0bb95e4b7276f53 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 16 Sep 2025 07:22:31 -0700 Subject: [PATCH] target/arm: Move endianness fixup for 32-bit registers MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Move the test outside of the banked register block, and repeat the AA32 test. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell --- target/arm/helper.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 4063c8a0b6f..18066b0c5dc 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7438,14 +7438,21 @@ static void add_cpreg_to_hashtable(ARMCPU *cpu, ARMCPRegInfo *r, */ r->type |= ARM_CP_ALIAS; } - - if (HOST_BIG_ENDIAN && - r->state == ARM_CP_STATE_BOTH && r->fieldoffset) { - r->fieldoffset += sizeof(uint32_t); - } } } + /* + * For 32-bit AArch32 regs shared with 64-bit AArch64 regs, + * adjust the field offset for endianness. This had to be + * delayed until banked registers were resolved. + */ + if (HOST_BIG_ENDIAN && + state == ARM_CP_STATE_AA32 && + r->state == ARM_CP_STATE_BOTH && + r->fieldoffset) { + r->fieldoffset += sizeof(uint32_t); + } + /* * Special registers (ie NOP/WFI) are never migratable and * are not even raw-accessible. -- 2.47.3