From 5d251aea55c3632ec4efb1ec8e2dd0a12c937e68 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Fri, 28 Aug 2009 15:15:27 +0200 Subject: [PATCH] backport: sync.md: Update comment about unpredictable LL/SC lock clearing by a taken branch. Backport from mainline: 2009-08-26 Uros Bizjak * config/alpha/sync.md: Update comment about unpredictable LL/SC lock clearing by a taken branch. (sync_): Split when epilogue_completed is set, effectively after bbro pass. (sync_nand): Ditto. (sync_old_): Ditto. (sync_old_nand): Ditto. (sync_new_): Dito. (sync_new_nand): Ditto. (sync_compare_and_swap_1): Ditto. (*sync_compare_and_swap): Ditto. (sync_lock_test_and_set_1): Ditto. ("sync_lock_test_and_set): Ditto. 2009-08-25 Uros Bizjak * config/alpha/alpha.md (*cmpdf_ieee_ext[123]): Remove. (*cmpdf_internal): Enable for all ALPHA_FPTM levels. (*movdfcc_ext[1234]): Disable for IEEE mode. 2009-08-16 Uros Bizjak * config/alpha/alpha.c (alpha_end_function): Handle NULL_RTX returned from prev_active_insn. testsuite/ChangeLog: Backport from mainline: 2009-08-17 Uros Bizjak * lib/target-supports.exp (check_effective_target_vect_cmdline_needed): Add alpha to the list of targets that do not need command line argument to enable SIMD. From-SVN: r151160 --- gcc/ChangeLog | 30 +++++++++++++++++ gcc/config/alpha/alpha.c | 2 +- gcc/config/alpha/alpha.md | 47 +++------------------------ gcc/config/alpha/sync.md | 27 +++++++-------- gcc/testsuite/ChangeLog | 9 +++++ gcc/testsuite/lib/target-supports.exp | 3 +- 6 files changed, 59 insertions(+), 59 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9ececb23744e..642029039ff2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,33 @@ +2009-08-28 Uros Bizjak + + Backport from mainline: + 2009-08-26 Uros Bizjak + + * config/alpha/sync.md: Update comment about unpredictable LL/SC lock + clearing by a taken branch. + (sync_): Split when epilogue_completed is set, + effectively after bbro pass. + (sync_nand): Ditto. + (sync_old_): Ditto. + (sync_old_nand): Ditto. + (sync_new_): Dito. + (sync_new_nand): Ditto. + (sync_compare_and_swap_1): Ditto. + (*sync_compare_and_swap): Ditto. + (sync_lock_test_and_set_1): Ditto. + ("sync_lock_test_and_set): Ditto. + + 2009-08-25 Uros Bizjak + + * config/alpha/alpha.md (*cmpdf_ieee_ext[123]): Remove. + (*cmpdf_internal): Enable for all ALPHA_FPTM levels. + (*movdfcc_ext[1234]): Disable for IEEE mode. + + 2009-08-16 Uros Bizjak + + * config/alpha/alpha.c (alpha_end_function): Handle NULL_RTX returned + from prev_active_insn. + 2009-08-24 Richard Guenther PR middle-end/41094 diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 44c5776ab4aa..3faeb0745fb4 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -8259,7 +8259,7 @@ alpha_end_function (FILE *file, const char *fnname, tree decl ATTRIBUTE_UNUSED) insn = get_last_insn (); if (!INSN_P (insn)) insn = prev_active_insn (insn); - if (GET_CODE (insn) == CALL_INSN) + if (insn && GET_CODE (insn) == CALL_INSN) output_asm_insn (get_insn_template (CODE_FOR_nop, NULL), NULL); #if TARGET_ABI_OSF diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 8cb92def1b0a..897ecc477f21 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -3699,19 +3699,7 @@ (match_operator:DF 1 "alpha_fp_comparison_operator" [(match_operand:DF 2 "reg_or_0_operand" "fG") (match_operand:DF 3 "reg_or_0_operand" "fG")]))] - "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" - "cmp%-%C1%/ %R2,%R3,%0" - [(set_attr "type" "fadd") - (set_attr "trap" "yes") - (set_attr "trap_suffix" "su")]) - -(define_insn "*cmpdf_ieee_ext1" - [(set (match_operand:DF 0 "register_operand" "=&f") - (match_operator:DF 1 "alpha_fp_comparison_operator" - [(float_extend:DF - (match_operand:SF 2 "reg_or_0_operand" "fG")) - (match_operand:DF 3 "reg_or_0_operand" "fG")]))] - "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" + "TARGET_FP" "cmp%-%C1%/ %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes") @@ -3729,18 +3717,6 @@ (set_attr "trap" "yes") (set_attr "trap_suffix" "su")]) -(define_insn "*cmpdf_ieee_ext2" - [(set (match_operand:DF 0 "register_operand" "=&f") - (match_operator:DF 1 "alpha_fp_comparison_operator" - [(match_operand:DF 2 "reg_or_0_operand" "fG") - (float_extend:DF - (match_operand:SF 3 "reg_or_0_operand" "fG"))]))] - "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" - "cmp%-%C1%/ %R2,%R3,%0" - [(set_attr "type" "fadd") - (set_attr "trap" "yes") - (set_attr "trap_suffix" "su")]) - (define_insn "*cmpdf_ext2" [(set (match_operand:DF 0 "register_operand" "=f") (match_operator:DF 1 "alpha_fp_comparison_operator" @@ -3753,19 +3729,6 @@ (set_attr "trap" "yes") (set_attr "trap_suffix" "su")]) -(define_insn "*cmpdf_ieee_ext3" - [(set (match_operand:DF 0 "register_operand" "=&f") - (match_operator:DF 1 "alpha_fp_comparison_operator" - [(float_extend:DF - (match_operand:SF 2 "reg_or_0_operand" "fG")) - (float_extend:DF - (match_operand:SF 3 "reg_or_0_operand" "fG"))]))] - "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" - "cmp%-%C1%/ %R2,%R3,%0" - [(set_attr "type" "fadd") - (set_attr "trap" "yes") - (set_attr "trap_suffix" "su")]) - (define_insn "*cmpdf_ext3" [(set (match_operand:DF 0 "register_operand" "=f") (match_operator:DF 1 "alpha_fp_comparison_operator" @@ -3815,7 +3778,7 @@ (match_operand:DF 2 "const0_operand" "G,G")]) (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG,0")) (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] - "TARGET_FP" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -3830,7 +3793,7 @@ (match_operand:DF 2 "const0_operand" "G,G")]) (match_operand:DF 1 "reg_or_0_operand" "fG,0") (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] - "TARGET_FP" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -3845,7 +3808,7 @@ (match_operand:DF 2 "const0_operand" "G,G")]) (match_operand:SF 1 "reg_or_0_operand" "fG,0") (match_operand:SF 5 "reg_or_0_operand" "0,fG")))] - "TARGET_FP" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" @@ -3860,7 +3823,7 @@ (match_operand:DF 2 "const0_operand" "G,G")]) (float_extend:DF (match_operand:SF 1 "reg_or_0_operand" "fG,0")) (match_operand:DF 5 "reg_or_0_operand" "0,fG")))] - "TARGET_FP" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "@ fcmov%C3 %R4,%R1,%0 fcmov%D3 %R4,%R5,%0" diff --git a/gcc/config/alpha/sync.md b/gcc/config/alpha/sync.md index 5c0d28403343..836a93434fa5 100644 --- a/gcc/config/alpha/sync.md +++ b/gcc/config/alpha/sync.md @@ -62,11 +62,8 @@ [(set_attr "type" "st_c")]) ;; The Alpha Architecture Handbook says that it is UNPREDICTABLE whether -;; the lock is cleared by a TAKEN branch. If we were to honor that, it -;; would mean that we could not expand a ll/sc sequence until after the -;; final basic-block reordering pass. Fortunately, it appears that no -;; Alpha implementation ever built actually clears the lock on branches, -;; taken or not. +;; the lock is cleared by a TAKEN branch. This means that we can not +;; expand a ll/sc sequence until after the final basic-block reordering pass. (define_insn_and_split "sync_" [(set (match_operand:I48MODE 0 "memory_operand" "+m") @@ -77,7 +74,7 @@ (clobber (match_scratch:I48MODE 2 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_atomic_op (, operands[0], operands[1], @@ -95,7 +92,7 @@ (clobber (match_scratch:I48MODE 2 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_atomic_op (NOT, operands[0], operands[1], @@ -115,7 +112,7 @@ (clobber (match_scratch:I48MODE 3 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_atomic_op (, operands[1], operands[2], @@ -135,7 +132,7 @@ (clobber (match_scratch:I48MODE 3 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_atomic_op (NOT, operands[1], operands[2], @@ -156,7 +153,7 @@ (clobber (match_scratch:I48MODE 3 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_atomic_op (, operands[1], operands[2], @@ -177,7 +174,7 @@ (clobber (match_scratch:I48MODE 3 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_atomic_op (NOT, operands[1], operands[2], @@ -212,7 +209,7 @@ (clobber (match_scratch:DI 6 "=X,&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_compare_and_swap_12 (mode, operands[0], operands[1], @@ -249,7 +246,7 @@ (clobber (match_scratch:I48MODE 4 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_compare_and_swap (operands[0], operands[1], operands[2], @@ -280,7 +277,7 @@ (clobber (match_scratch:DI 4 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_lock_test_and_set_12 (mode, operands[0], operands[1], @@ -299,7 +296,7 @@ (clobber (match_scratch:I48MODE 3 "=&r"))] "" "#" - "reload_completed" + "epilogue_completed" [(const_int 0)] { alpha_split_lock_test_and_set (operands[0], operands[1], diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index cc883d55e9ee..e27d2eda3238 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2009-08-28 Uros Bizjak + + Backport from mainline: + 2009-08-17 Uros Bizjak + + * lib/target-supports.exp + (check_effective_target_vect_cmdline_needed): Add alpha to the list + of targets that do not need command line argument to enable SIMD. + 2009-08-24 Richard Guenther PR middle-end/41094 diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index c9e6826a4032..ab9886f2ef00 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1086,7 +1086,8 @@ proc check_effective_target_vect_cmdline_needed { } { verbose "check_effective_target_vect_cmdline_needed: using cached result" 2 } else { set et_vect_cmdline_needed_saved 1 - if { [istarget ia64-*-*] + if { [istarget alpha*-*-*] + || [istarget ia64-*-*] || (([istarget x86_64-*-*] || [istarget i?86-*-*]) && [check_effective_target_lp64]) || ([istarget powerpc*-*-*] -- 2.47.2