From 5ec46ea778299a7fdc30c66db28df5fd02eb2555 Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Thu, 1 Sep 2016 15:19:07 +0000 Subject: [PATCH] Connect up the v8 memory insn tests to the build system, and arrange for both ARM and Thumb encodings to be tested. Modify the existing v8 crypto tests so that both ARM and Thumb encodings are tested. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15943 --- none/tests/arm/Makefile.am | 18 +- none/tests/arm/v8crypto.vgtest | 2 - none/tests/arm/{v8crypto.c => v8crypto_a.c} | 0 ...rypto.stderr.exp => v8crypto_a.stderr.exp} | 0 ...rypto.stdout.exp => v8crypto_a.stdout.exp} | 0 none/tests/arm/v8crypto_a.vgtest | 2 + none/tests/arm/v8crypto_t.c | 1 + none/tests/arm/v8crypto_t.stderr.exp | 1 + none/tests/arm/v8crypto_t.stdout.exp | 1 + none/tests/arm/v8crypto_t.vgtest | 2 + none/tests/arm/{v8memory.c => v8memory_a.c} | 0 none/tests/arm/v8memory_a.stderr.exp | 0 none/tests/arm/v8memory_a.stdout.exp | 280 ++++++++++++++++++ none/tests/arm/v8memory_a.vgtest | 2 + none/tests/arm/v8memory_t.c | 1 + none/tests/arm/v8memory_t.stderr.exp | 1 + none/tests/arm/v8memory_t.stdout.exp | 1 + none/tests/arm/v8memory_t.vgtest | 2 + 18 files changed, 309 insertions(+), 5 deletions(-) delete mode 100644 none/tests/arm/v8crypto.vgtest rename none/tests/arm/{v8crypto.c => v8crypto_a.c} (100%) rename none/tests/arm/{v8crypto.stderr.exp => v8crypto_a.stderr.exp} (100%) rename none/tests/arm/{v8crypto.stdout.exp => v8crypto_a.stdout.exp} (100%) create mode 100644 none/tests/arm/v8crypto_a.vgtest create mode 120000 none/tests/arm/v8crypto_t.c create mode 120000 none/tests/arm/v8crypto_t.stderr.exp create mode 120000 none/tests/arm/v8crypto_t.stdout.exp create mode 100644 none/tests/arm/v8crypto_t.vgtest rename none/tests/arm/{v8memory.c => v8memory_a.c} (100%) create mode 100644 none/tests/arm/v8memory_a.stderr.exp create mode 100644 none/tests/arm/v8memory_a.stdout.exp create mode 100644 none/tests/arm/v8memory_a.vgtest create mode 120000 none/tests/arm/v8memory_t.c create mode 120000 none/tests/arm/v8memory_t.stderr.exp create mode 120000 none/tests/arm/v8memory_t.stdout.exp create mode 100644 none/tests/arm/v8memory_t.vgtest diff --git a/none/tests/arm/Makefile.am b/none/tests/arm/Makefile.am index d967aef821..7b10de86a8 100644 --- a/none/tests/arm/Makefile.am +++ b/none/tests/arm/Makefile.am @@ -12,7 +12,10 @@ EXTRA_DIST = \ v6intARM.stdout.exp v6intARM.stderr.exp v6intARM.vgtest \ v6intThumb.stdout.exp v6intThumb.stderr.exp v6intThumb.vgtest \ v6media.stdout.exp v6media.stderr.exp v6media.vgtest \ - v8crypto.stdout.exp v8crypto.stderr.exp v8crypto.vgtest \ + v8crypto_a.stdout.exp v8crypto_a.stderr.exp v8crypto_a.vgtest \ + v8crypto_t.stdout.exp v8crypto_t.stderr.exp v8crypto_t.vgtest \ + v8memory_a.stdout.exp v8memory_a.stderr.exp v8memory_a.vgtest \ + v8memory_t.stdout.exp v8memory_t.stderr.exp v8memory_t.vgtest \ vcvt_fixed_float_VFP.stdout.exp vcvt_fixed_float_VFP.stderr.exp \ vcvt_fixed_float_VFP.vgtest \ vfp.stdout.exp vfp.stderr.exp vfp.vgtest \ @@ -28,7 +31,10 @@ check_PROGRAMS = \ v6intARM \ v6intThumb \ v6media \ - v8crypto \ + v8crypto_a \ + v8crypto_t \ + v8memory_a \ + v8memory_t \ vcvt_fixed_float_VFP \ vfp \ vfpv4_fma @@ -51,7 +57,13 @@ v6intThumb_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb v6media_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb -v8crypto_CFLAGS = $(AM_CFLAGS) -g -O0 -mfpu=crypto-neon-fp-armv8 +v8crypto_a_CFLAGS = $(AM_CFLAGS) -g -O0 -mfpu=crypto-neon-fp-armv8 -marm +v8crypto_t_CFLAGS = $(AM_CFLAGS) -g -O0 -mfpu=crypto-neon-fp-armv8 -mthumb + +v8memory_a_CFLAGS = $(AM_CFLAGS) -g -O0 \ + -march=armv8-a -mfpu=crypto-neon-fp-armv8 -marm +v8memory_t_CFLAGS = $(AM_CFLAGS) -g -O0 \ + -march=armv8-a -mfpu=crypto-neon-fp-armv8 -mthumb vfp_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 \ -mfpu=neon \ diff --git a/none/tests/arm/v8crypto.vgtest b/none/tests/arm/v8crypto.vgtest deleted file mode 100644 index 90db678cd2..0000000000 --- a/none/tests/arm/v8crypto.vgtest +++ /dev/null @@ -1,2 +0,0 @@ -prog: v8crypto -vgopts: -q diff --git a/none/tests/arm/v8crypto.c b/none/tests/arm/v8crypto_a.c similarity index 100% rename from none/tests/arm/v8crypto.c rename to none/tests/arm/v8crypto_a.c diff --git a/none/tests/arm/v8crypto.stderr.exp b/none/tests/arm/v8crypto_a.stderr.exp similarity index 100% rename from none/tests/arm/v8crypto.stderr.exp rename to none/tests/arm/v8crypto_a.stderr.exp diff --git a/none/tests/arm/v8crypto.stdout.exp b/none/tests/arm/v8crypto_a.stdout.exp similarity index 100% rename from none/tests/arm/v8crypto.stdout.exp rename to none/tests/arm/v8crypto_a.stdout.exp diff --git a/none/tests/arm/v8crypto_a.vgtest b/none/tests/arm/v8crypto_a.vgtest new file mode 100644 index 0000000000..e32317a508 --- /dev/null +++ b/none/tests/arm/v8crypto_a.vgtest @@ -0,0 +1,2 @@ +prog: v8crypto_a +vgopts: -q diff --git a/none/tests/arm/v8crypto_t.c b/none/tests/arm/v8crypto_t.c new file mode 120000 index 0000000000..14ce292c67 --- /dev/null +++ b/none/tests/arm/v8crypto_t.c @@ -0,0 +1 @@ +v8crypto_a.c \ No newline at end of file diff --git a/none/tests/arm/v8crypto_t.stderr.exp b/none/tests/arm/v8crypto_t.stderr.exp new file mode 120000 index 0000000000..ba179f50dc --- /dev/null +++ b/none/tests/arm/v8crypto_t.stderr.exp @@ -0,0 +1 @@ +v8crypto_a.stderr.exp \ No newline at end of file diff --git a/none/tests/arm/v8crypto_t.stdout.exp b/none/tests/arm/v8crypto_t.stdout.exp new file mode 120000 index 0000000000..9a39742b62 --- /dev/null +++ b/none/tests/arm/v8crypto_t.stdout.exp @@ -0,0 +1 @@ +v8crypto_a.stdout.exp \ No newline at end of file diff --git a/none/tests/arm/v8crypto_t.vgtest b/none/tests/arm/v8crypto_t.vgtest new file mode 100644 index 0000000000..a1210357d1 --- /dev/null +++ b/none/tests/arm/v8crypto_t.vgtest @@ -0,0 +1,2 @@ +prog: v8crypto_t +vgopts: -q diff --git a/none/tests/arm/v8memory.c b/none/tests/arm/v8memory_a.c similarity index 100% rename from none/tests/arm/v8memory.c rename to none/tests/arm/v8memory_a.c diff --git a/none/tests/arm/v8memory_a.stderr.exp b/none/tests/arm/v8memory_a.stderr.exp new file mode 100644 index 0000000000..e69de29bb2 diff --git a/none/tests/arm/v8memory_a.stdout.exp b/none/tests/arm/v8memory_a.stdout.exp new file mode 100644 index 0000000000..d42f76ae3d --- /dev/null +++ b/none/tests/arm/v8memory_a.stdout.exp @@ -0,0 +1,280 @@ +LDA{,B,H} (reg) + +lda r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 94c87dfb r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldab r9, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + bf153f1b r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldah r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + bf1bfa0f r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +STL{,B,H} (reg) + +stl r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] 5f 54 c5 05 .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +stlb r9, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] 99 .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +stlh r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] 72 97 .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +LDAEX{,B,H,D} (reg) + +ldaex r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 9b7a3e28 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldaexb r9, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 4490a389 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldaexh r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + ab5a6969 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldaexd r2, r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 5b766a75 r2 (xor, data intreg #1) + 22d70ad9 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 00000000 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +STLEX{,B,H,D} (reg) -- expected to fail + +clrex; stlex r9, r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + d8d1584e r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +clrex; stlexb r9, r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + bb0a700f r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +clrex; stlexh r9, r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + adc8836c r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +clrex; stlexd r9, r2, r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 9b43a481 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +STLEX{,B,H,D} (reg) -- expected to succeed + +ldaex r2, [r10] ; stlex r9, r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] 31 40 35 27 .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 0f73db2f r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + b2943eb7 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldaexb r2, [r10] ; stlexb r9, r6, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] df .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + b000c173 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + c522f103 r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +ldaexh r2, [r10] ; stlexh r9, r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] 2d ee .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 62f1d42d r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + 966d434a r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + +mov r4, r2 ; mov r5, r3 ; ldaexd r2, r3, [r10] ; mov r2, r4 ; mov r3, r5 ; stlexd r9, r2, r3, [r10] with r10 = middle_of_block + [ 0] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 16] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 32] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 48] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 64] ec b1 cc 36 7c 21 2b 86 .. .. .. .. .. .. .. .. + [ 80] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [ 96] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + [112] .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. .. + 00000000 r2 (xor, data intreg #1) + 00000000 r3 (xor, data intreg #2) + 00000000 r6 (xor, data intreg #3) + f841384f r9 (xor, data intreg #4) + 00000000 r10 (xor, addr intreg #1) + diff --git a/none/tests/arm/v8memory_a.vgtest b/none/tests/arm/v8memory_a.vgtest new file mode 100644 index 0000000000..1e5e726a9a --- /dev/null +++ b/none/tests/arm/v8memory_a.vgtest @@ -0,0 +1,2 @@ +prog: v8memory_a +vgopts: -q diff --git a/none/tests/arm/v8memory_t.c b/none/tests/arm/v8memory_t.c new file mode 120000 index 0000000000..5aba12d581 --- /dev/null +++ b/none/tests/arm/v8memory_t.c @@ -0,0 +1 @@ +v8memory_a.c \ No newline at end of file diff --git a/none/tests/arm/v8memory_t.stderr.exp b/none/tests/arm/v8memory_t.stderr.exp new file mode 120000 index 0000000000..34e4fadb6e --- /dev/null +++ b/none/tests/arm/v8memory_t.stderr.exp @@ -0,0 +1 @@ +v8memory_a.stderr.exp \ No newline at end of file diff --git a/none/tests/arm/v8memory_t.stdout.exp b/none/tests/arm/v8memory_t.stdout.exp new file mode 120000 index 0000000000..248654d547 --- /dev/null +++ b/none/tests/arm/v8memory_t.stdout.exp @@ -0,0 +1 @@ +v8memory_a.stdout.exp \ No newline at end of file diff --git a/none/tests/arm/v8memory_t.vgtest b/none/tests/arm/v8memory_t.vgtest new file mode 100644 index 0000000000..5a914134b0 --- /dev/null +++ b/none/tests/arm/v8memory_t.vgtest @@ -0,0 +1,2 @@ +prog: v8memory_t +vgopts: -q -- 2.47.2