From 61b540db5e13d2c776d27ea493e6cdc8fe90e490 Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Tue, 19 Jul 2011 07:39:18 +0000 Subject: [PATCH] Add test cases for NEON VMUL by float scalar. Bug 277663. (Mans Rullgard, mans@mansr.com) git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11901 --- none/tests/arm/neon128.c | 29 ++++++++++++++++ none/tests/arm/neon128.stdout.exp | 28 ++++++++++++++++ none/tests/arm/neon64.c | 29 ++++++++++++++++ none/tests/arm/neon64.stdout.exp | 55 +++++++++++++++++++++++++++++++ 4 files changed, 141 insertions(+) diff --git a/none/tests/arm/neon128.c b/none/tests/arm/neon128.c index 9ca94fba39..97c3d4c538 100644 --- a/none/tests/arm/neon128.c +++ b/none/tests/arm/neon128.c @@ -2404,6 +2404,35 @@ int main(int argc, char **argv) TESTINSN_bin("vmul.f32 q0, q1, q2", q0, q1, i32, f2u(-INFINITY), q2, i32, f2u(INFINITY)); TESTINSN_bin("vmul.f32 q0, q1, q2", q0, q1, i32, f2u(-INFINITY), q2, i32, f2u(-INFINITY)); + printf("---- VMUL (fp by scalar) ----\n"); + TESTINSN_bin("vmul.f32 q0, q1, d4[0]", q0, q1, i32, f2u(24), d4, i32, f2u(120)); + TESTINSN_bin("vmul.f32 q15, q8, d7[1]", q15, q8, i32, f2u(140), d7, i32, f2u(-120)); + TESTINSN_bin("vmul.f32 q4, q8, d15[1]", q4, q8, i32, (1 << 31) + 1, d15, i32, (1 << 31) + 2); + TESTINSN_bin("vmul.f32 q7, q8, d1[1]", q7, q8, i32, (1 << 31), d1, i16, 12); + TESTINSN_bin("vmul.f32 q7, q8, d1[1]", q7, q8, i32, (1 << 31) + 1, d1, i32, (1 << 31) + 2); + TESTINSN_bin("vmul.f32 q7, q8, d1[0]", q7, q8, i32, f2u(1e22), d1, i32, f2u(1e-19)); + TESTINSN_bin("vmul.f32 q7, q8, d1[0]", q7, q8, i32, f2u(1e12), d1, i32, f2u(1e11)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(NAN), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(NAN), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(NAN), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(NAN), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(NAN), d2, i32, f2u(-INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(0.0), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(0.0), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(0.0), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(0.0), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(0.0), d2, i32, f2u(-INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(INFINITY), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(INFINITY), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(INFINITY), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(INFINITY), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(INFINITY), d2, i32, f2u(-INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(-INFINITY), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(-INFINITY), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(-INFINITY), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(-INFINITY), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 q0, q1, d2[0]", q0, q1, i32, f2u(-INFINITY), d2, i32, f2u(-INFINITY)); + printf("---- VMLA (fp) ----\n"); TESTINSN_bin_f("vmla.f32 q0, q5, q2", q0, q5, i32, f2u(23.04), q2, i32, f2u(-45.5687)); TESTINSN_bin_f("vmla.f32 q3, q4, q5", q3, q4, i32, f2u(-347856.475), q5, i32, f2u(1346)); diff --git a/none/tests/arm/neon128.stdout.exp b/none/tests/arm/neon128.stdout.exp index ff75a019a1..96329623b4 100644 --- a/none/tests/arm/neon128.stdout.exp +++ b/none/tests/arm/neon128.stdout.exp @@ -3102,6 +3102,34 @@ vmul.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0 vmul.f32 q0, q1, q2 :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000 vmul.f32 q0, q1, q2 :: Qd 0xff800000 0xff800000 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000 vmul.f32 q0, q1, q2 :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000 +---- VMUL (fp by scalar) ---- +vmul.f32 q0, q1, d4[0] :: Qd 0x45340000 0x45340000 0x45340000 0x45340000 Qm (i32)0x41c00000 Qn (i32)0x42f00000 +vmul.f32 q15, q8, d7[1] :: Qd 0xc6834000 0xc6834000 0xc6834000 0xc6834000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000 +vmul.f32 q4, q8, d15[1] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 +vmul.f32 q7, q8, d1[1] :: Qd 0x80000000 0x80000000 0x80000000 0x80000000 Qm (i32)0x80000000 Qn (i16)0x0000000c +vmul.f32 q7, q8, d1[1] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 +vmul.f32 q7, q8, d1[0] :: Qd 0x4479ffff 0x4479ffff 0x4479ffff 0x4479ffff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a +vmul.f32 q7, q8, d1[0] :: Qd 0x65a96816 0x65a96816 0x65a96816 0x65a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x3f800000 0x3f800000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000 +vmul.f32 q0, q1, d2[0] :: Qd 0x00000000 0x00000000 0x3f800000 0x3f800000 Qm (i32)0x00000000 Qn (i32)0x3f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x00000000 0x00000000 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0xff800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x3f800000 0x3f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0xff800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000 +vmul.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x3f800000 0x3f800000 Qm (i32)0xff800000 Qn (i32)0x3f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7fc00000 0x7fc00000 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000 +vmul.f32 q0, q1, d2[0] :: Qd 0xff800000 0xff800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000 +vmul.f32 q0, q1, d2[0] :: Qd 0x7f800000 0x7f800000 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000 ---- VMLA (fp) ---- vmla.f32 q0, q5, q2 :: Qd 0xc4831ce4 0xc4831ce4 0xc4831ce4 0xc4831ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659 vmla.f32 q0, q5, q2 :: Qd 0x3f800000 0x3f800000 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659 diff --git a/none/tests/arm/neon64.c b/none/tests/arm/neon64.c index a936302b12..a3052d2163 100644 --- a/none/tests/arm/neon64.c +++ b/none/tests/arm/neon64.c @@ -3535,6 +3535,35 @@ int main(int argc, char **argv) TESTINSN_bin("vmul.f32 d0, d1, d2", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(INFINITY)); TESTINSN_bin("vmul.f32 d0, d1, d2", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(-INFINITY)); + printf("---- VMUL (fp by scalar) ----\n"); + TESTINSN_bin("vmul.f32 d0, d1, d4[0]", d0, d1, i32, f2u(24), d4, i32, f2u(120)); + TESTINSN_bin("vmul.f32 d31, d8, d7[1]", d31, d8, i32, f2u(140), d7, i32, f2u(-120)); + TESTINSN_bin("vmul.f32 d4, d8, d15[1]", d4, d8, i32, (1 << 31) + 1, d15, i32, (1 << 31) + 2); + TESTINSN_bin("vmul.f32 d7, d8, d1[1]", d7, d8, i32, (1 << 31), d1, i16, 12); + TESTINSN_bin("vmul.f32 d17, d8, d1[1]", d17, d8, i32, (1 << 31) + 1, d1, i32, (1 << 31) + 2); + TESTINSN_bin("vmul.f32 d7, d8, d1[0]", d7, d8, i32, f2u(1e22), d1, i32, f2u(1e-19)); + TESTINSN_bin("vmul.f32 d7, d24, d1[0]", d7, d24, i32, f2u(1e12), d1, i32, f2u(1e11)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(NAN), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(NAN), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(NAN), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(NAN), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(NAN), d2, i32, f2u(-INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(0.0), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(0.0), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(0.0), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(0.0), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(0.0), d2, i32, f2u(-INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(INFINITY), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(INFINITY), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(INFINITY), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(INFINITY), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(INFINITY), d2, i32, f2u(-INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(NAN)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(1.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(0.0)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(INFINITY)); + TESTINSN_bin("vmul.f32 d0, d1, d2[0]", d0, d1, i32, f2u(-INFINITY), d2, i32, f2u(-INFINITY)); + printf("---- VMLA (fp) ----\n"); TESTINSN_bin_f("vmla.f32 d0, d5, d2", d0, d5, i32, f2u(23.04), d2, i32, f2u(-45.5687)); TESTINSN_bin_f("vmla.f32 d3, d4, d5", d3, d4, i32, f2u(-347856.475), d5, i32, f2u(1346)); diff --git a/none/tests/arm/neon64.stdout.exp b/none/tests/arm/neon64.stdout.exp index a42cf783bb..574a5c69e9 100644 --- a/none/tests/arm/neon64.stdout.exp +++ b/none/tests/arm/neon64.stdout.exp @@ -4536,6 +4536,61 @@ vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7 vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000 vmul.f32 d0, d1, d2 :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000 vmul.f32 d0, d1, d2 :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000 +---- VMUL (fp by scalar) ---- +vmul.f32 d0, d1, d4[0] :: Qd 0x45340000 0x45340000 Qm (i32)0x41c00000 Qn (i32)0x42f00000 +vmul.f32 d0, d1, d4[0] :: Qd 0x16916879 0x15952c3d Qm (i32)0x41c00000 Qn (i32)0x42f00000 +vmul.f32 d31, d8, d7[1] :: Qd 0xc6834000 0xc6834000 Qm (i32)0x430c0000 Qn (i32)0xc2f00000 +vmul.f32 d31, d8, d7[1] :: Qd 0x96916879 0x95952c3d Qm (i32)0x430c0000 Qn (i32)0xc2f00000 +vmul.f32 d4, d8, d15[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 +vmul.f32 d4, d8, d15[1] :: Qd 0x80000000 0x80000000 Qm (i32)0x80000001 Qn (i32)0x80000002 +vmul.f32 d7, d8, d1[1] :: Qd 0x80000000 0x80000000 Qm (i32)0x80000000 Qn (i16)0x0000000c +vmul.f32 d7, d8, d1[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x80000000 Qn (i16)0x0000000c +vmul.f32 d17, d8, d1[1] :: Qd 0x00000000 0x00000000 Qm (i32)0x80000001 Qn (i32)0x80000002 +vmul.f32 d17, d8, d1[1] :: Qd 0x80000000 0x80000000 Qm (i32)0x80000001 Qn (i32)0x80000002 +vmul.f32 d7, d8, d1[0] :: Qd 0x4479ffff 0x4479ffff Qm (i32)0x64078678 Qn (i32)0x1fec1e4a +vmul.f32 d7, d8, d1[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x64078678 Qn (i32)0x1fec1e4a +vmul.f32 d7, d24, d1[0] :: Qd 0x65a96816 0x65a96816 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7 +vmul.f32 d7, d24, d1[0] :: Qd 0x2561b3fd 0x24678bf2 Qm (i32)0x5368d4a5 Qn (i32)0x51ba43b7 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7fc00000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x7fc00000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7fc00000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7fc00000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7fc00000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x00000000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x00000000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x00000000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x00000000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x00000000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0x7f800000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0x7f800000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x00000000 0x00000000 Qm (i32)0x7f800000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0x7f800000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0x7f800000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x7fc00000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x131b1a1b 0x121f1e1f Qm (i32)0xff800000 Qn (i32)0x3f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7fc00000 0x7fc00000 Qm (i32)0xff800000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0x00000000 0x00000000 Qm (i32)0xff800000 Qn (i32)0x00000000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0x7f800000 +vmul.f32 d0, d1, d2[0] :: Qd 0x7f800000 0x7f800000 Qm (i32)0xff800000 Qn (i32)0xff800000 +vmul.f32 d0, d1, d2[0] :: Qd 0xff800000 0xff800000 Qm (i32)0xff800000 Qn (i32)0xff800000 ---- VMLA (fp) ---- vmla.f32 d0, d5, d2 :: Qd 0xc4831ce4 0xc4831ce4 Qm (i32)0x41b851ec Qn (i32)0xc2364659 vmla.f32 d0, d5, d2 :: Qd 0x3f800000 0x3f800000 Qm (i32)0x41b851ec Qn (i32)0xc2364659 -- 2.47.2